123     ADDR_ASSERT(pOut->pTileInfo);  in DispatchComputeSurfaceInfo()
249         ADDR_ASSERT((pIn->width % 8) == 0);  in ComputeSurfaceInfoLinear()
292            ADDR_ASSERT((pIn->pitchAlign % pOut->pitchAlign) == 0);  in ComputeSurfaceInfoLinear()
309            ADDR_ASSERT((pIn->heightAlign % pOut->heightAlign) == 0);  in ComputeSurfaceInfoLinear()
580             ADDR_ASSERT(Thickness(expTileMode) == 1);  in ComputeSurfaceInfoMacroTiled()
808             ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0);  in HwlReduceBankWidthHeight()
1062     ADDR_ASSERT(valid == TRUE);  in SanityCheckMacroTiled()
1065     ADDR_ASSERT(numPipes * pTileInfo->banks >= 4);  in SanityCheckMacroTiled()
1183     ADDR_ASSERT(IsMacroTiled(pIn->tileMode));  in HwlGetAlignmentInfoMacroTiled()
1187     ADDR_ASSERT(pIn->pTileInfo);  in HwlGetAlignmentInfoMacroTiled()
1243     ADDR_ASSERT(numSlices < Thickness(baseTileMode));  in HwlDegradeThickTileMode()
1345             ADDR_ASSERT(sample < numSamples);  in DispatchComputeSurfaceAddrFromCoord()
1355                 ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE);  in DispatchComputeSurfaceAddrFromCoord()
2007         ADDR_ASSERT(microTileType == ADDR_NON_DISPLAYABLE ||  in HwlComputePixelCoordFromOffset()
2111         ADDR_ASSERT((m_chipFamily >= ADDR_CHIP_FAMILY_CI) && (thickness > 1));  in HwlComputePixelCoordFromOffset()
2216                 ADDR_ASSERT(microTileType != ADDR_DISPLAYABLE);  in DispatchComputeSurfaceCoordFromAddr()
2722     ADDR_ASSERT(IsMacroTiled(pIn->tileMode));  in HwlComputeBaseSwizzle()
2723     ADDR_ASSERT(pIn->pTileInfo);  in HwlComputeBaseSwizzle()
3869                 ADDR_ASSERT((m_configFlags.useTileIndex == FALSE) ||  in HwlComputeSurfaceInfo()
3876                     ADDR_ASSERT(tileInfo.banks == pIn->pTileInfo->banks);  in HwlComputeSurfaceInfo()
3877                     ADDR_ASSERT(tileInfo.bankWidth == pIn->pTileInfo->bankWidth);  in HwlComputeSurfaceInfo()
3878                     ADDR_ASSERT(tileInfo.bankHeight == pIn->pTileInfo->bankHeight);  in HwlComputeSurfaceInfo()
3879                     ADDR_ASSERT(tileInfo.macroAspectRatio == pIn->pTileInfo->macroAspectRatio);  in HwlComputeSurfaceInfo()
3880                     ADDR_ASSERT(tileInfo.tileSplitBytes == pIn->pTileInfo->tileSplitBytes);  in HwlComputeSurfaceInfo()
4002     ADDR_ASSERT(isWidth8 && isHeight8);  in HwlComputeHtileBpp()
4027         ADDR_ASSERT(pTileInfo != NULL);  in HwlComputeHtileBaseAlign()
4123     ADDR_ASSERT((physicalSliceSize % baseAlign) == 0);  in HwlGetSizeAdjustmentMicroTiled()