101     ADDR_TILEINFO       tileInfoDef   = {0};  in DispatchComputeSurfaceInfo()
102     ADDR_TILEINFO*      pTileInfo     = &tileInfoDef;  in DispatchComputeSurfaceInfo()
140         memset(pTileInfo, 0, sizeof(ADDR_TILEINFO));  in DispatchComputeSurfaceInfo()
774     ADDR_TILEINFO*      pTileInfo           ///< [in,out] bank structure.  in HwlReduceBankWidthHeight()
880     ADDR_TILEINFO* pTileInfo = pOut->pTileInfo;  in ComputeSurfaceAlignmentsMacroTiled()
976     ADDR_TILEINFO* pTileInfo   ///< [in] macro-tiled parameters  in SanityCheckMacroTiled()
1090     ADDR_TILEINFO*      pTileInfo       ///< [in] ptr to bank structure  in ComputeSurfaceMipLevelTileMode()
1188     ADDR_TILEINFO tileInfo = *pIn->pTileInfo;  in HwlGetAlignmentInfoMacroTiled()
1329     ADDR_TILEINFO*      pTileInfo          = pIn->pTileInfo;  in DispatchComputeSurfaceAddrFromCoord()
1455     ADDR_TILEINFO*      pTileInfo,              ///< [in] bank structure  in ComputeMacroTileEquation()
1598     ADDR_TILEINFO*      pTileInfo,              ///< [in] bank structure  in ComputeSurfaceAddrFromCoordMacroTiled()
2190     ADDR_TILEINFO*      pTileInfo          = pIn->pTileInfo;  in DispatchComputeSurfaceCoordFromAddr()
2331     ADDR_TILEINFO*      pTileInfo,          ///< [in] bank structure.  in ComputeSurfaceCoordFromAddrMacroTiled()
2484     ADDR_TILEINFO*      pTileInfo,  ///< [in] bank structure. **All fields to be valid on entry**  in ComputeSurfaceCoord2DFromBankPipe()
2685     ADDR_TILEINFO*  pTileInfo,      ///< [in] tile info  in HwlCombineBankPipeSwizzle()
2720     ADDR_TILEINFO* pTileInfo = pIn->pTileInfo;  in HwlComputeBaseSwizzle()
2792     ADDR_TILEINFO*  pTileInfo,      ///< [in] 2D tile parameters. Client must provide all data  in ExtractBankPipeSwizzle()
2832     ADDR_TILEINFO*  pTileInfo       ///< [in] tile info  in GetBankPipeSwizzle()
2859     ADDR_TILEINFO* pTileInfo       ///< [in] Bank structure  in ComputeSliceTileSwizzle()
2962     ADDR_TILEINFO*  pTileInfo       ///< [in] tile info  in ComputeBankFromCoord()
3321     ADDR_TILEINFO tileInfo = {0};  in HwlComputeFmaskInfo()
3486     const ADDR_TILEINFO* pTileInfo)  in IsTileInfoAllZero()
3518     const ADDR_TILEINFO* pLeft, ///<[in] Left compare operand  in HwlTileInfoEqual()
3519     const ADDR_TILEINFO* pRight ///<[in] Right compare operand  in HwlTileInfoEqual()
3552     ADDR_TILEINFO *pTileInfoIn  = pIn->pTileInfo;  in HwlConvertTileInfoToHW()
3553     ADDR_TILEINFO *pTileInfoOut = pOut->pTileInfo;  in HwlConvertTileInfoToHW()
3825     ADDR_TILEINFO tileInfo = {0};  in HwlComputeSurfaceInfo()
4020     ADDR_TILEINFO*  pTileInfo       ///< [in] Tile info  in HwlComputeHtileBaseAlign()
4141     ADDR_TILEINFO* pTileInfo    ///< Tiling info  in HwlStereoCheckRightOffsetPadding()