Lines Matching full:info
57 static unsigned cik_get_num_tile_pipes(struct amdgpu_gpu_info *info) in cik_get_num_tile_pipes() argument
59 unsigned mode2d = info->gb_tile_mode[CIK_TILE_MODE_COLOR_2D]; in cik_get_num_tile_pipes()
96 struct radeon_info *info, in ac_query_gpu_info() argument
108 /* Get PCI info. */ in ac_query_gpu_info()
114 info->pci_domain = devinfo->businfo.pci->domain; in ac_query_gpu_info()
115 info->pci_bus = devinfo->businfo.pci->bus; in ac_query_gpu_info()
116 info->pci_dev = devinfo->businfo.pci->dev; in ac_query_gpu_info()
117 info->pci_func = devinfo->businfo.pci->func; in ac_query_gpu_info()
177 if (info->drm_major == 3 && info->drm_minor >= 17) { in ac_query_gpu_info()
185 if (info->drm_major == 3 && info->drm_minor >= 17) { in ac_query_gpu_info()
194 &info->me_fw_version, in ac_query_gpu_info()
195 &info->me_fw_feature); in ac_query_gpu_info()
202 &info->pfp_fw_version, in ac_query_gpu_info()
203 &info->pfp_fw_feature); in ac_query_gpu_info()
210 &info->ce_fw_version, in ac_query_gpu_info()
211 &info->ce_fw_feature); in ac_query_gpu_info()
238 info->pci_id = amdinfo->asic_id; /* TODO: is this correct? */ in ac_query_gpu_info()
239 info->vce_harvest_config = amdinfo->vce_harvest_config; in ac_query_gpu_info()
241 switch (info->pci_id) { in ac_query_gpu_info()
242 #define CHIPSET(pci_id, cfamily) case pci_id: info->family = CHIP_##cfamily; break; in ac_query_gpu_info()
251 if (info->family >= CHIP_VEGA10) in ac_query_gpu_info()
252 info->chip_class = GFX9; in ac_query_gpu_info()
253 else if (info->family >= CHIP_TONGA) in ac_query_gpu_info()
254 info->chip_class = VI; in ac_query_gpu_info()
255 else if (info->family >= CHIP_BONAIRE) in ac_query_gpu_info()
256 info->chip_class = CIK; in ac_query_gpu_info()
257 else if (info->family >= CHIP_TAHITI) in ac_query_gpu_info()
258 info->chip_class = SI; in ac_query_gpu_info()
265 info->has_dedicated_vram = in ac_query_gpu_info()
269 info->gart_size = gtt.heap_size; in ac_query_gpu_info()
270 info->vram_size = vram.heap_size; in ac_query_gpu_info()
271 info->vram_vis_size = vram_vis.heap_size; in ac_query_gpu_info()
275 info->max_alloc_size = MIN2(info->vram_size * 0.9, info->gart_size * 0.7); in ac_query_gpu_info()
277 info->max_shader_clock = amdinfo->max_engine_clk / 1000; in ac_query_gpu_info()
278 info->max_se = amdinfo->num_shader_engines; in ac_query_gpu_info()
279 info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine; in ac_query_gpu_info()
280 info->has_hw_decode = in ac_query_gpu_info()
282 info->uvd_fw_version = in ac_query_gpu_info()
284 info->vce_fw_version = in ac_query_gpu_info()
286 info->has_userptr = true; in ac_query_gpu_info()
287 info->has_syncobj = has_syncobj(fd); in ac_query_gpu_info()
288 info->has_syncobj_wait_for_submit = info->has_syncobj && info->drm_minor >= 20; in ac_query_gpu_info()
289 info->has_fence_to_handle = info->has_syncobj && info->drm_minor >= 21; in ac_query_gpu_info()
290 info->has_ctx_priority = info->drm_minor >= 22; in ac_query_gpu_info()
291 info->num_render_backends = amdinfo->rb_pipes; in ac_query_gpu_info()
292 info->clock_crystal_freq = amdinfo->gpu_counter_freq; in ac_query_gpu_info()
293 if (!info->clock_crystal_freq) { in ac_query_gpu_info()
295 info->clock_crystal_freq = 1; in ac_query_gpu_info()
297 info->tcc_cache_line_size = 64; /* TC L2 line size on GCN */ in ac_query_gpu_info()
298 if (info->chip_class == GFX9) { in ac_query_gpu_info()
299 info->num_tile_pipes = 1 << G_0098F8_NUM_PIPES(amdinfo->gb_addr_cfg); in ac_query_gpu_info()
300 info->pipe_interleave_bytes = in ac_query_gpu_info()
303 info->num_tile_pipes = cik_get_num_tile_pipes(amdinfo); in ac_query_gpu_info()
304 info->pipe_interleave_bytes = in ac_query_gpu_info()
307 info->has_virtual_memory = true; in ac_query_gpu_info()
312 info->num_sdma_rings = util_bitcount(dma.available_rings); in ac_query_gpu_info()
313 info->num_compute_rings = util_bitcount(compute.available_rings); in ac_query_gpu_info()
316 info->num_good_compute_units = 0; in ac_query_gpu_info()
317 for (i = 0; i < info->max_se; i++) in ac_query_gpu_info()
318 for (j = 0; j < info->max_sh_per_se; j++) in ac_query_gpu_info()
319 info->num_good_compute_units += in ac_query_gpu_info()
322 memcpy(info->si_tile_mode_array, amdinfo->gb_tile_mode, in ac_query_gpu_info()
324 info->enabled_rb_mask = amdinfo->enabled_rb_pipes_mask; in ac_query_gpu_info()
326 memcpy(info->cik_macrotile_mode_array, amdinfo->gb_macro_tile_mode, in ac_query_gpu_info()
329 info->pte_fragment_size = alignment_info.size_local; in ac_query_gpu_info()
330 info->gart_page_size = alignment_info.size_remote; in ac_query_gpu_info()
332 if (info->chip_class == SI) in ac_query_gpu_info()
333 info->gfx_ib_pad_with_type2 = TRUE; in ac_query_gpu_info()
343 info->ib_start_alignment = ib_align; in ac_query_gpu_info()
358 void ac_compute_device_uuid(struct radeon_info *info, char *uuid, size_t size) in ac_compute_device_uuid() argument
365 * Use the device info directly instead of using a sha1. GL/VK UUIDs in ac_compute_device_uuid()
370 uint_uuid[0] = info->pci_domain; in ac_compute_device_uuid()
371 uint_uuid[1] = info->pci_bus; in ac_compute_device_uuid()
372 uint_uuid[2] = info->pci_dev; in ac_compute_device_uuid()
373 uint_uuid[3] = info->pci_func; in ac_compute_device_uuid()
376 void ac_print_gpu_info(struct radeon_info *info) in ac_print_gpu_info() argument
379 info->pci_domain, info->pci_bus, in ac_print_gpu_info()
380 info->pci_dev, info->pci_func); in ac_print_gpu_info()
381 printf("pci_id = 0x%x\n", info->pci_id); in ac_print_gpu_info()
382 printf("family = %i\n", info->family); in ac_print_gpu_info()
383 printf("chip_class = %i\n", info->chip_class); in ac_print_gpu_info()
384 printf("pte_fragment_size = %u\n", info->pte_fragment_size); in ac_print_gpu_info()
385 printf("gart_page_size = %u\n", info->gart_page_size); in ac_print_gpu_info()
386 printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(info->gart_size, 1024*1024)); in ac_print_gpu_info()
387 printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_size, 1024*1024)); in ac_print_gpu_info()
388 printf("vram_vis_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_vis_size, 1024*1024)); in ac_print_gpu_info()
390 (int)DIV_ROUND_UP(info->max_alloc_size, 1024*1024)); in ac_print_gpu_info()
391 printf("min_alloc_size = %u\n", info->min_alloc_size); in ac_print_gpu_info()
392 printf("has_dedicated_vram = %u\n", info->has_dedicated_vram); in ac_print_gpu_info()
393 printf("has_virtual_memory = %i\n", info->has_virtual_memory); in ac_print_gpu_info()
394 printf("gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2); in ac_print_gpu_info()
395 printf("has_hw_decode = %u\n", info->has_hw_decode); in ac_print_gpu_info()
396 printf("num_sdma_rings = %i\n", info->num_sdma_rings); in ac_print_gpu_info()
397 printf("num_compute_rings = %u\n", info->num_compute_rings); in ac_print_gpu_info()
398 printf("uvd_fw_version = %u\n", info->uvd_fw_version); in ac_print_gpu_info()
399 printf("vce_fw_version = %u\n", info->vce_fw_version); in ac_print_gpu_info()
400 printf("me_fw_version = %i\n", info->me_fw_version); in ac_print_gpu_info()
401 printf("me_fw_feature = %i\n", info->me_fw_feature); in ac_print_gpu_info()
402 printf("pfp_fw_version = %i\n", info->pfp_fw_version); in ac_print_gpu_info()
403 printf("pfp_fw_feature = %i\n", info->pfp_fw_feature); in ac_print_gpu_info()
404 printf("ce_fw_version = %i\n", info->ce_fw_version); in ac_print_gpu_info()
405 printf("ce_fw_feature = %i\n", info->ce_fw_feature); in ac_print_gpu_info()
406 printf("vce_harvest_config = %i\n", info->vce_harvest_config); in ac_print_gpu_info()
407 printf("clock_crystal_freq = %i\n", info->clock_crystal_freq); in ac_print_gpu_info()
408 printf("tcc_cache_line_size = %u\n", info->tcc_cache_line_size); in ac_print_gpu_info()
409 printf("drm = %i.%i.%i\n", info->drm_major, in ac_print_gpu_info()
410 info->drm_minor, info->drm_patchlevel); in ac_print_gpu_info()
411 printf("has_userptr = %i\n", info->has_userptr); in ac_print_gpu_info()
412 printf("has_syncobj = %u\n", info->has_syncobj); in ac_print_gpu_info()
413 printf("has_fence_to_handle = %u\n", info->has_fence_to_handle); in ac_print_gpu_info()
415 printf("r600_max_quad_pipes = %i\n", info->r600_max_quad_pipes); in ac_print_gpu_info()
416 printf("max_shader_clock = %i\n", info->max_shader_clock); in ac_print_gpu_info()
417 printf("num_good_compute_units = %i\n", info->num_good_compute_units); in ac_print_gpu_info()
418 printf("max_se = %i\n", info->max_se); in ac_print_gpu_info()
419 printf("max_sh_per_se = %i\n", info->max_sh_per_se); in ac_print_gpu_info()
421 printf("r600_gb_backend_map = %i\n", info->r600_gb_backend_map); in ac_print_gpu_info()
422 printf("r600_gb_backend_map_valid = %i\n", info->r600_gb_backend_map_valid); in ac_print_gpu_info()
423 printf("r600_num_banks = %i\n", info->r600_num_banks); in ac_print_gpu_info()
424 printf("num_render_backends = %i\n", info->num_render_backends); in ac_print_gpu_info()
425 printf("num_tile_pipes = %i\n", info->num_tile_pipes); in ac_print_gpu_info()
426 printf("pipe_interleave_bytes = %i\n", info->pipe_interleave_bytes); in ac_print_gpu_info()
427 printf("enabled_rb_mask = 0x%x\n", info->enabled_rb_mask); in ac_print_gpu_info()
428 printf("max_alignment = %u\n", (unsigned)info->max_alignment); in ac_print_gpu_info()