499 	if (image->fmask.size) {  in si_make_texture_descriptor()
504 		va = gpu_address + image->offset + image->fmask.offset;  in si_make_texture_descriptor()
540 		fmask_state[0] |= image->fmask.tile_swizzle;  in si_make_texture_descriptor()
557 			fmask_state[3] |= S_008F1C_SW_MODE(image->surface.u.gfx9.fmask.swizzle_mode);  in si_make_texture_descriptor()
559 					  S_008F20_PITCH_GFX9(image->surface.u.gfx9.fmask.epitch);  in si_make_texture_descriptor()
563 			fmask_state[3] |= S_008F1C_TILING_INDEX(image->fmask.tile_mode_index);  in si_make_texture_descriptor()
565 				S_008F20_PITCH_GFX6(image->fmask.pitch_in_pixels - 1);  in si_make_texture_descriptor()
658 	struct radeon_surf fmask = {};  in radv_image_get_fmask_info()  local
668 	fmask.blk_w = image->surface.blk_w;  in radv_image_get_fmask_info()
669 	fmask.blk_h = image->surface.blk_h;  in radv_image_get_fmask_info()
671 	fmask.flags = image->surface.flags | RADEON_SURF_FMASK;  in radv_image_get_fmask_info()
679 	fmask.flags = RADEON_SURF_CLR(fmask.flags, MODE);  in radv_image_get_fmask_info()
680 	fmask.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);  in radv_image_get_fmask_info()
685 		fmask.bpe = 1;  in radv_image_get_fmask_info()
688 		fmask.bpe = 4;  in radv_image_get_fmask_info()
694 	device->ws->surface_init(device->ws, &info, &fmask);  in radv_image_get_fmask_info()
695 	assert(fmask.u.legacy.level[0].mode == RADEON_SURF_MODE_2D);  in radv_image_get_fmask_info()
697 	out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64;  in radv_image_get_fmask_info()
701 	out->tile_mode_index = fmask.u.legacy.tiling_index[0];  in radv_image_get_fmask_info()
702 	out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x;  in radv_image_get_fmask_info()
703 	out->bank_height = fmask.u.legacy.bankh;  in radv_image_get_fmask_info()
704 	out->tile_swizzle = fmask.tile_swizzle;  in radv_image_get_fmask_info()
705 	out->alignment = MAX2(256, fmask.surf_alignment);  in radv_image_get_fmask_info()
706 	out->size = fmask.surf_size;  in radv_image_get_fmask_info()
715 	radv_image_get_fmask_info(device, image, image->info.samples, &image->fmask);  in radv_image_alloc_fmask()
717 	image->fmask.offset = align64(image->size, image->fmask.alignment);  in radv_image_alloc_fmask()
718 	image->size = image->fmask.offset + image->fmask.size;  in radv_image_alloc_fmask()
719 	image->alignment = MAX2(image->alignment, image->fmask.alignment);  in radv_image_alloc_fmask()