Lines Matching refs:qpu
30 switch (inst->qpu.type) { in vir_get_non_sideband_nsrc()
34 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) in vir_get_non_sideband_nsrc()
35 return v3d_qpu_add_op_num_src(inst->qpu.alu.add.op); in vir_get_non_sideband_nsrc()
37 return v3d_qpu_mul_op_num_src(inst->qpu.alu.mul.op); in vir_get_non_sideband_nsrc()
57 switch (inst->qpu.type) { in vir_has_implicit_uniform()
87 switch (inst->qpu.type) { in vir_has_side_effects()
91 switch (inst->qpu.alu.add.op) { in vir_has_side_effects()
104 switch (inst->qpu.alu.mul.op) { in vir_has_side_effects()
112 if (inst->qpu.sig.ldtmu || in vir_has_side_effects()
113 inst->qpu.sig.ldvary || in vir_has_side_effects()
114 inst->qpu.sig.wrtmuc || in vir_has_side_effects()
115 inst->qpu.sig.thrsw) { in vir_has_side_effects()
126 switch (inst->qpu.type) { in vir_is_float_input()
130 switch (inst->qpu.alu.add.op) { in vir_is_float_input()
141 switch (inst->qpu.alu.mul.op) { in vir_is_float_input()
157 if (inst->qpu.type != V3D_QPU_INSTR_TYPE_ALU || in vir_is_raw_mov()
158 (inst->qpu.alu.mul.op != V3D_QPU_M_FMOV && in vir_is_raw_mov()
159 inst->qpu.alu.mul.op != V3D_QPU_M_MOV)) { in vir_is_raw_mov()
163 if (inst->qpu.alu.add.output_pack != V3D_QPU_PACK_NONE || in vir_is_raw_mov()
164 inst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE) { in vir_is_raw_mov()
168 if (inst->qpu.flags.ac != V3D_QPU_COND_NONE || in vir_is_raw_mov()
169 inst->qpu.flags.mc != V3D_QPU_COND_NONE) in vir_is_raw_mov()
178 return (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU && in vir_is_add()
179 inst->qpu.alu.add.op != V3D_QPU_A_NOP); in vir_is_add()
185 return (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU && in vir_is_mul()
186 inst->qpu.alu.mul.op != V3D_QPU_M_NOP); in vir_is_mul()
201 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH) { in vir_depends_on_flags()
202 return (inst->qpu.branch.cond != V3D_QPU_BRANCH_COND_ALWAYS); in vir_depends_on_flags()
204 return (inst->qpu.flags.ac != V3D_QPU_COND_NONE && in vir_depends_on_flags()
205 inst->qpu.flags.mc != V3D_QPU_COND_NONE); in vir_depends_on_flags()
221 if (devinfo->ver < 41 && (inst->qpu.sig.ldvary || in vir_writes_r3()
222 inst->qpu.sig.ldtlb || in vir_writes_r3()
223 inst->qpu.sig.ldtlbu || in vir_writes_r3()
224 inst->qpu.sig.ldvpm)) { in vir_writes_r3()
249 if (devinfo->ver < 41 && inst->qpu.sig.ldtmu) in vir_writes_r4()
263 inst->qpu.alu.add.a_unpack = unpack; in vir_set_unpack()
265 inst->qpu.alu.add.b_unpack = unpack; in vir_set_unpack()
269 inst->qpu.alu.mul.a_unpack = unpack; in vir_set_unpack()
271 inst->qpu.alu.mul.b_unpack = unpack; in vir_set_unpack()
279 inst->qpu.flags.ac = cond; in vir_set_cond()
282 inst->qpu.flags.mc = cond; in vir_set_cond()
290 inst->qpu.flags.apf = pf; in vir_set_pf()
293 inst->qpu.flags.mpf = pf; in vir_set_pf()
371 inst->qpu = v3d_qpu_nop(); in vir_add_inst()
372 inst->qpu.alu.add.op = op; in vir_add_inst()
387 inst->qpu = v3d_qpu_nop(); in vir_mul_inst()
388 inst->qpu.alu.mul.op = op; in vir_mul_inst()
403 inst->qpu = v3d_qpu_nop(); in vir_branch_inst()
404 inst->qpu.type = V3D_QPU_INSTR_TYPE_BRANCH; in vir_branch_inst()
405 inst->qpu.branch.cond = cond; in vir_branch_inst()
406 inst->qpu.branch.msfign = V3D_QPU_MSFIGN_NONE; in vir_branch_inst()
407 inst->qpu.branch.bdi = V3D_QPU_BRANCH_DEST_REL; in vir_branch_inst()
408 inst->qpu.branch.ub = true; in vir_branch_inst()
409 inst->qpu.branch.bdu = V3D_QPU_BRANCH_DEST_REL; in vir_branch_inst()