Lines Matching refs:ANYMUX
450 #define ANYMUX MUX_MASK(0, 7) macro
464 { 0, 47, ANYMUX, ANYMUX, V3D_QPU_A_FADD },
465 { 0, 47, ANYMUX, ANYMUX, V3D_QPU_A_FADDNF },
466 { 53, 55, ANYMUX, ANYMUX, V3D_QPU_A_VFPACK },
467 { 56, 56, ANYMUX, ANYMUX, V3D_QPU_A_ADD },
468 { 57, 59, ANYMUX, ANYMUX, V3D_QPU_A_VFPACK },
469 { 60, 60, ANYMUX, ANYMUX, V3D_QPU_A_SUB },
470 { 61, 63, ANYMUX, ANYMUX, V3D_QPU_A_VFPACK },
471 { 64, 111, ANYMUX, ANYMUX, V3D_QPU_A_FSUB },
472 { 120, 120, ANYMUX, ANYMUX, V3D_QPU_A_MIN },
473 { 121, 121, ANYMUX, ANYMUX, V3D_QPU_A_MAX },
474 { 122, 122, ANYMUX, ANYMUX, V3D_QPU_A_UMIN },
475 { 123, 123, ANYMUX, ANYMUX, V3D_QPU_A_UMAX },
476 { 124, 124, ANYMUX, ANYMUX, V3D_QPU_A_SHL },
477 { 125, 125, ANYMUX, ANYMUX, V3D_QPU_A_SHR },
478 { 126, 126, ANYMUX, ANYMUX, V3D_QPU_A_ASR },
479 { 127, 127, ANYMUX, ANYMUX, V3D_QPU_A_ROR },
481 { 128, 175, ANYMUX, ANYMUX, V3D_QPU_A_FMIN },
482 { 128, 175, ANYMUX, ANYMUX, V3D_QPU_A_FMAX },
483 { 176, 180, ANYMUX, ANYMUX, V3D_QPU_A_VFMIN },
485 { 181, 181, ANYMUX, ANYMUX, V3D_QPU_A_AND },
486 { 182, 182, ANYMUX, ANYMUX, V3D_QPU_A_OR },
487 { 183, 183, ANYMUX, ANYMUX, V3D_QPU_A_XOR },
489 { 184, 184, ANYMUX, ANYMUX, V3D_QPU_A_VADD },
490 { 185, 185, ANYMUX, ANYMUX, V3D_QPU_A_VSUB },
491 { 186, 186, 1 << 0, ANYMUX, V3D_QPU_A_NOT },
492 { 186, 186, 1 << 1, ANYMUX, V3D_QPU_A_NEG },
493 { 186, 186, 1 << 2, ANYMUX, V3D_QPU_A_FLAPUSH },
494 { 186, 186, 1 << 3, ANYMUX, V3D_QPU_A_FLBPUSH },
495 { 186, 186, 1 << 4, ANYMUX, V3D_QPU_A_FLBPOP },
496 { 186, 186, 1 << 6, ANYMUX, V3D_QPU_A_SETMSF },
497 { 186, 186, 1 << 7, ANYMUX, V3D_QPU_A_SETREVF },
521 { 187, 187, 1 << 3, ANYMUX, V3D_QPU_A_VPMSETUP, 33 },
522 { 188, 188, 1 << 0, ANYMUX, V3D_QPU_A_LDVPMV_IN, 40 },
523 { 188, 188, 1 << 1, ANYMUX, V3D_QPU_A_LDVPMD_IN, 40 },
524 { 188, 188, 1 << 2, ANYMUX, V3D_QPU_A_LDVPMP, 40 },
525 { 189, 189, ANYMUX, ANYMUX, V3D_QPU_A_LDVPMG_IN, 40 },
530 { 192, 239, ANYMUX, ANYMUX, V3D_QPU_A_FCMP },
531 { 240, 244, ANYMUX, ANYMUX, V3D_QPU_A_VFMAX },
533 { 245, 245, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FROUND },
534 { 245, 245, 1 << 3, ANYMUX, V3D_QPU_A_FTOIN },
535 { 245, 245, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FTRUNC },
536 { 245, 245, 1 << 7, ANYMUX, V3D_QPU_A_FTOIZ },
537 { 246, 246, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FFLOOR },
538 { 246, 246, 1 << 3, ANYMUX, V3D_QPU_A_FTOUZ },
539 { 246, 246, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FCEIL },
540 { 246, 246, 1 << 7, ANYMUX, V3D_QPU_A_FTOC },
542 { 247, 247, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FDX },
543 { 247, 247, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FDY },
546 { 248, 248, ANYMUX, ANYMUX, V3D_QPU_A_STVPMV },
547 { 248, 248, ANYMUX, ANYMUX, V3D_QPU_A_STVPMD },
548 { 248, 248, ANYMUX, ANYMUX, V3D_QPU_A_STVPMP },
550 { 252, 252, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_ITOF },
551 { 252, 252, 1 << 3, ANYMUX, V3D_QPU_A_CLZ },
552 { 252, 252, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_UTOF },
556 { 1, 1, ANYMUX, ANYMUX, V3D_QPU_M_ADD },
557 { 2, 2, ANYMUX, ANYMUX, V3D_QPU_M_SUB },
558 { 3, 3, ANYMUX, ANYMUX, V3D_QPU_M_UMUL24 },
559 { 4, 8, ANYMUX, ANYMUX, V3D_QPU_M_VFMUL },
560 { 9, 9, ANYMUX, ANYMUX, V3D_QPU_M_SMUL24 },
561 { 10, 10, ANYMUX, ANYMUX, V3D_QPU_M_MULTOP },
562 { 14, 14, ANYMUX, ANYMUX, V3D_QPU_M_FMOV },
563 { 15, 15, MUX_MASK(0, 3), ANYMUX, V3D_QPU_M_FMOV },
565 { 15, 15, 1 << 7, ANYMUX, V3D_QPU_M_MOV },
566 { 16, 63, ANYMUX, ANYMUX, V3D_QPU_M_FMUL },