Lines Matching full:body
6 ir_factory body(&sig->body, mem_ctx); in umul64()
16 body.emit(r0003); in umul64()
17 body.emit(assign(r0003, imul_high(swizzle_x(r0001), swizzle_x(r0002)), 0x02)); in umul64()
19 body.emit(assign(r0003, mul(swizzle_x(r0001), swizzle_x(r0002)), 0x01)); in umul64()
24 body.emit(assign(r0003, add(swizzle_y(r0003), r0006), 0x02)); in umul64()
26 body.emit(ret(r0003)); in umul64()
36 ir_factory body(&sig->body, mem_ctx); in sign64()
44 body.emit(r0008); in sign64()
45 body.emit(assign(r0008, rshift(swizzle_y(r0007), body.constant(int(31))), 0x02)); in sign64()
48 ir_expression *const r000A = nequal(r0009, body.constant(int(0))); in sign64()
50 body.emit(assign(r0008, bit_or(swizzle_y(r0008), r000B), 0x01)); in sign64()
52 body.emit(ret(r0008)); in sign64()
62 ir_factory body(&sig->body, mem_ctx); in udivmod64()
72 body.emit(r000E); in udivmod64()
74 body.emit(r000F); in udivmod64()
76 body.emit(r0010); in udivmod64()
78 body.emit(r0011); in udivmod64()
79 body.emit(assign(r0011, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03)); in udivmod64()
82 body.emit(assign(r0010, add(r0012, body.constant(int(32))), 0x01)); in udivmod64()
85 ir_expression *const r0014 = equal(swizzle_y(r000D), body.constant(0u)); in udivmod64()
89 exec_list *const f0013_parent_instructions = body.instructions; in udivmod64()
92 body.instructions = &f0013->then_instructions; in udivmod64()
95 body.emit(r0017); in udivmod64()
96 ir_variable *const r0018 = body.make_temp(glsl_type::int_type, "findMSB_retval"); in udivmod64()
97 body.emit(assign(r0018, expr(ir_unop_find_msb, swizzle_x(r000D)), 0x01)); in udivmod64()
99 body.emit(assign(r0010, r0018, 0x01)); in udivmod64()
101 body.emit(assign(r0017, body.constant(int(31)), 0x01)); in udivmod64()
105 exec_list *const f0019_parent_instructions = body.instructions; in udivmod64()
107 body.instructions = &f0019->body_instructions; in udivmod64()
110 ir_expression *const r001B = less(r0017, body.constant(int(1))); in udivmod64()
112 exec_list *const f001A_parent_instructions = body.instructions; in udivmod64()
115 body.instructions = &f001A->then_instructions; in udivmod64()
117 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in udivmod64()
120 body.instructions = f001A_parent_instructions; in udivmod64()
121 body.emit(f001A); in udivmod64()
126 ir_expression *const r001D = sub(body.constant(int(31)), r0017); in udivmod64()
132 exec_list *const f001C_parent_instructions = body.instructions; in udivmod64()
135 body.instructions = &f001C->then_instructions; in udivmod64()
138 body.emit(assign(r000C, sub(swizzle_y(r000C), r0022), 0x02)); in udivmod64()
140 ir_expression *const r0023 = lshift(body.constant(1u), r0017); in udivmod64()
141 body.emit(assign(r0011, bit_or(swizzle_y(r0011), r0023), 0x02)); in udivmod64()
144 body.instructions = f001C_parent_instructions; in udivmod64()
145 body.emit(f001C); in udivmod64()
149 body.emit(assign(r0017, add(r0017, body.constant(int(-1))), 0x01)); in udivmod64()
153 body.instructions = f0019_parent_instructions; in udivmod64()
154 body.emit(f0019); in udivmod64()
159 exec_list *const f0024_parent_instructions = body.instructions; in udivmod64()
162 body.instructions = &f0024->then_instructions; in udivmod64()
164 body.emit(assign(r000C, sub(swizzle_y(r000C), swizzle_x(r000D)), 0x02)); in udivmod64()
166 body.emit(assign(r0011, bit_or(swizzle_y(r0011), body.constant(1u)), 0x02)); in udivmod64()
169 body.instructions = f0024_parent_instructions; in udivmod64()
170 body.emit(f0024); in udivmod64()
175 body.instructions = f0013_parent_instructions; in udivmod64()
176 body.emit(f0013); in udivmod64()
180 ir_variable *const r0026 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval"); in udivmod64()
181 body.emit(assign(r0026, expr(ir_unop_pack_uint_2x32, r000D), 0x01)); in udivmod64()
183 body.emit(assign(r000F, expr(ir_unop_pack_uint_2x32, r000C), 0x01)); in udivmod64()
185 body.emit(assign(r000E, body.constant(int(31)), 0x01)); in udivmod64()
189 exec_list *const f0027_parent_instructions = body.instructions; in udivmod64()
191 body.instructions = &f0027->body_instructions; in udivmod64()
194 ir_expression *const r0029 = less(r000E, body.constant(int(1))); in udivmod64()
196 exec_list *const f0028_parent_instructions = body.instructions; in udivmod64()
199 body.instructions = &f0028->then_instructions; in udivmod64()
201 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in udivmod64()
204 body.instructions = f0028_parent_instructions; in udivmod64()
205 body.emit(f0028); in udivmod64()
210 ir_expression *const r002B = sub(body.constant(int(63)), r000E); in udivmod64()
216 exec_list *const f002A_parent_instructions = body.instructions; in udivmod64()
219 body.instructions = &f002A->then_instructions; in udivmod64()
222 body.emit(assign(r000F, sub(r000F, r0030), 0x01)); in udivmod64()
224 ir_expression *const r0031 = lshift(body.constant(1u), r000E); in udivmod64()
225 body.emit(assign(r0011, bit_or(swizzle_x(r0011), r0031), 0x01)); in udivmod64()
228 body.instructions = f002A_parent_instructions; in udivmod64()
229 body.emit(f002A); in udivmod64()
233 body.emit(assign(r000E, add(r000E, body.constant(int(-1))), 0x01)); in udivmod64()
237 body.instructions = f0027_parent_instructions; in udivmod64()
238 body.emit(f0027); in udivmod64()
243 exec_list *const f0032_parent_instructions = body.instructions; in udivmod64()
246 body.instructions = &f0032->then_instructions; in udivmod64()
248 body.emit(assign(r000F, sub(r000F, r0026), 0x01)); in udivmod64()
250 body.emit(assign(r0011, bit_or(swizzle_x(r0011), body.constant(1u)), 0x01)); in udivmod64()
253 body.instructions = f0032_parent_instructions; in udivmod64()
254 body.emit(f0032); in udivmod64()
258 ir_variable *const r0034 = body.make_temp(glsl_type::uvec4_type, "vec_ctor"); in udivmod64()
259 body.emit(assign(r0034, r0011, 0x03)); in udivmod64()
261 body.emit(assign(r0034, expr(ir_unop_unpack_uint_2x32, r000F), 0x0c)); in udivmod64()
263 body.emit(ret(r0034)); in udivmod64()
273 ir_factory body(&sig->body, mem_ctx); in udiv64()
282 ir_variable *const r0037 = body.make_temp(glsl_type::uvec2_type, "n"); in udiv64()
283 body.emit(assign(r0037, r0035, 0x03)); in udiv64()
286 body.emit(r0038); in udiv64()
288 body.emit(r0039); in udiv64()
290 body.emit(r003A); in udiv64()
292 body.emit(r003B); in udiv64()
293 body.emit(assign(r003B, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03)); in udiv64()
296 body.emit(assign(r003A, add(r003C, body.constant(int(32))), 0x01)); in udiv64()
299 ir_expression *const r003E = equal(swizzle_y(r0036), body.constant(0u)); in udiv64()
303 exec_list *const f003D_parent_instructions = body.instructions; in udiv64()
306 body.instructions = &f003D->then_instructions; in udiv64()
309 body.emit(r0041); in udiv64()
310 ir_variable *const r0042 = body.make_temp(glsl_type::int_type, "findMSB_retval"); in udiv64()
311 body.emit(assign(r0042, expr(ir_unop_find_msb, swizzle_x(r0036)), 0x01)); in udiv64()
313 body.emit(assign(r003A, r0042, 0x01)); in udiv64()
315 body.emit(assign(r0041, body.constant(int(31)), 0x01)); in udiv64()
319 exec_list *const f0043_parent_instructions = body.instructions; in udiv64()
321 body.instructions = &f0043->body_instructions; in udiv64()
324 ir_expression *const r0045 = less(r0041, body.constant(int(1))); in udiv64()
326 exec_list *const f0044_parent_instructions = body.instructions; in udiv64()
329 body.instructions = &f0044->then_instructions; in udiv64()
331 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in udiv64()
334 body.instructions = f0044_parent_instructions; in udiv64()
335 body.emit(f0044); in udiv64()
340 ir_expression *const r0047 = sub(body.constant(int(31)), r0041); in udiv64()
346 exec_list *const f0046_parent_instructions = body.instructions; in udiv64()
349 body.instructions = &f0046->then_instructions; in udiv64()
352 body.emit(assign(r0037, sub(swizzle_y(r0037), r004C), 0x02)); in udiv64()
354 ir_expression *const r004D = lshift(body.constant(1u), r0041); in udiv64()
355 body.emit(assign(r003B, bit_or(swizzle_y(r003B), r004D), 0x02)); in udiv64()
358 body.instructions = f0046_parent_instructions; in udiv64()
359 body.emit(f0046); in udiv64()
363 body.emit(assign(r0041, add(r0041, body.constant(int(-1))), 0x01)); in udiv64()
367 body.instructions = f0043_parent_instructions; in udiv64()
368 body.emit(f0043); in udiv64()
373 exec_list *const f004E_parent_instructions = body.instructions; in udiv64()
376 body.instructions = &f004E->then_instructions; in udiv64()
378 body.emit(assign(r0037, sub(swizzle_y(r0037), swizzle_x(r0036)), 0x02)); in udiv64()
380 body.emit(assign(r003B, bit_or(swizzle_y(r003B), body.constant(1u)), 0x02)); in udiv64()
383 body.instructions = f004E_parent_instructions; in udiv64()
384 body.emit(f004E); in udiv64()
389 body.instructions = f003D_parent_instructions; in udiv64()
390 body.emit(f003D); in udiv64()
394 ir_variable *const r0050 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval"); in udiv64()
395 body.emit(assign(r0050, expr(ir_unop_pack_uint_2x32, r0036), 0x01)); in udiv64()
397 body.emit(assign(r0039, expr(ir_unop_pack_uint_2x32, r0037), 0x01)); in udiv64()
399 body.emit(assign(r0038, body.constant(int(31)), 0x01)); in udiv64()
403 exec_list *const f0051_parent_instructions = body.instructions; in udiv64()
405 body.instructions = &f0051->body_instructions; in udiv64()
408 ir_expression *const r0053 = less(r0038, body.constant(int(1))); in udiv64()
410 exec_list *const f0052_parent_instructions = body.instructions; in udiv64()
413 body.instructions = &f0052->then_instructions; in udiv64()
415 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in udiv64()
418 body.instructions = f0052_parent_instructions; in udiv64()
419 body.emit(f0052); in udiv64()
424 ir_expression *const r0055 = sub(body.constant(int(63)), r0038); in udiv64()
430 exec_list *const f0054_parent_instructions = body.instructions; in udiv64()
433 body.instructions = &f0054->then_instructions; in udiv64()
436 body.emit(assign(r0039, sub(r0039, r005A), 0x01)); in udiv64()
438 ir_expression *const r005B = lshift(body.constant(1u), r0038); in udiv64()
439 body.emit(assign(r003B, bit_or(swizzle_x(r003B), r005B), 0x01)); in udiv64()
442 body.instructions = f0054_parent_instructions; in udiv64()
443 body.emit(f0054); in udiv64()
447 body.emit(assign(r0038, add(r0038, body.constant(int(-1))), 0x01)); in udiv64()
451 body.instructions = f0051_parent_instructions; in udiv64()
452 body.emit(f0051); in udiv64()
457 exec_list *const f005C_parent_instructions = body.instructions; in udiv64()
460 body.instructions = &f005C->then_instructions; in udiv64()
462 body.emit(assign(r0039, sub(r0039, r0050), 0x01)); in udiv64()
464 body.emit(assign(r003B, bit_or(swizzle_x(r003B), body.constant(1u)), 0x01)); in udiv64()
467 body.instructions = f005C_parent_instructions; in udiv64()
468 body.emit(f005C); in udiv64()
472 body.emit(ret(r003B)); in udiv64()
482 ir_factory body(&sig->body, mem_ctx); in idiv64()
492 body.emit(r0060); in idiv64()
493 ir_expression *const r0061 = less(swizzle_y(r005E), body.constant(int(0))); in idiv64()
494 ir_expression *const r0062 = less(swizzle_y(r005F), body.constant(int(0))); in idiv64()
495 body.emit(assign(r0060, nequal(r0061, r0062), 0x01)); in idiv64()
497 ir_variable *const r0063 = body.make_temp(glsl_type::uvec2_type, "n"); in idiv64()
501 body.emit(assign(r0063, expr(ir_unop_unpack_uint_2x32, r0066), 0x03)); in idiv64()
503 ir_variable *const r0067 = body.make_temp(glsl_type::uvec2_type, "d"); in idiv64()
507 body.emit(assign(r0067, expr(ir_unop_unpack_uint_2x32, r006A), 0x03)); in idiv64()
510 body.emit(r006B); in idiv64()
512 body.emit(r006C); in idiv64()
514 body.emit(r006D); in idiv64()
516 body.emit(r006E); in idiv64()
517 body.emit(assign(r006E, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03)); in idiv64()
520 body.emit(assign(r006D, add(r006F, body.constant(int(32))), 0x01)); in idiv64()
523 ir_expression *const r0071 = equal(swizzle_y(r0067), body.constant(0u)); in idiv64()
527 exec_list *const f0070_parent_instructions = body.instructions; in idiv64()
530 body.instructions = &f0070->then_instructions; in idiv64()
533 body.emit(r0074); in idiv64()
534 ir_variable *const r0075 = body.make_temp(glsl_type::int_type, "findMSB_retval"); in idiv64()
535 body.emit(assign(r0075, expr(ir_unop_find_msb, swizzle_x(r0067)), 0x01)); in idiv64()
537 body.emit(assign(r006D, r0075, 0x01)); in idiv64()
539 body.emit(assign(r0074, body.constant(int(31)), 0x01)); in idiv64()
543 exec_list *const f0076_parent_instructions = body.instructions; in idiv64()
545 body.instructions = &f0076->body_instructions; in idiv64()
548 ir_expression *const r0078 = less(r0074, body.constant(int(1))); in idiv64()
550 exec_list *const f0077_parent_instructions = body.instructions; in idiv64()
553 body.instructions = &f0077->then_instructions; in idiv64()
555 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in idiv64()
558 body.instructions = f0077_parent_instructions; in idiv64()
559 body.emit(f0077); in idiv64()
564 ir_expression *const r007A = sub(body.constant(int(31)), r0074); in idiv64()
570 exec_list *const f0079_parent_instructions = body.instructions; in idiv64()
573 body.instructions = &f0079->then_instructions; in idiv64()
576 body.emit(assign(r0063, sub(swizzle_y(r0063), r007F), 0x02)); in idiv64()
578 ir_expression *const r0080 = lshift(body.constant(1u), r0074); in idiv64()
579 body.emit(assign(r006E, bit_or(swizzle_y(r006E), r0080), 0x02)); in idiv64()
582 body.instructions = f0079_parent_instructions; in idiv64()
583 body.emit(f0079); in idiv64()
587 body.emit(assign(r0074, add(r0074, body.constant(int(-1))), 0x01)); in idiv64()
591 body.instructions = f0076_parent_instructions; in idiv64()
592 body.emit(f0076); in idiv64()
597 exec_list *const f0081_parent_instructions = body.instructions; in idiv64()
600 body.instructions = &f0081->then_instructions; in idiv64()
602 body.emit(assign(r0063, sub(swizzle_y(r0063), swizzle_x(r0067)), 0x02)); in idiv64()
604 body.emit(assign(r006E, bit_or(swizzle_y(r006E), body.constant(1u)), 0x02)); in idiv64()
607 body.instructions = f0081_parent_instructions; in idiv64()
608 body.emit(f0081); in idiv64()
613 body.instructions = f0070_parent_instructions; in idiv64()
614 body.emit(f0070); in idiv64()
618 ir_variable *const r0083 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval"); in idiv64()
619 body.emit(assign(r0083, expr(ir_unop_pack_uint_2x32, r0067), 0x01)); in idiv64()
621 body.emit(assign(r006C, expr(ir_unop_pack_uint_2x32, r0063), 0x01)); in idiv64()
623 body.emit(assign(r006B, body.constant(int(31)), 0x01)); in idiv64()
627 exec_list *const f0084_parent_instructions = body.instructions; in idiv64()
629 body.instructions = &f0084->body_instructions; in idiv64()
632 ir_expression *const r0086 = less(r006B, body.constant(int(1))); in idiv64()
634 exec_list *const f0085_parent_instructions = body.instructions; in idiv64()
637 body.instructions = &f0085->then_instructions; in idiv64()
639 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in idiv64()
642 body.instructions = f0085_parent_instructions; in idiv64()
643 body.emit(f0085); in idiv64()
648 ir_expression *const r0088 = sub(body.constant(int(63)), r006B); in idiv64()
654 exec_list *const f0087_parent_instructions = body.instructions; in idiv64()
657 body.instructions = &f0087->then_instructions; in idiv64()
660 body.emit(assign(r006C, sub(r006C, r008D), 0x01)); in idiv64()
662 ir_expression *const r008E = lshift(body.constant(1u), r006B); in idiv64()
663 body.emit(assign(r006E, bit_or(swizzle_x(r006E), r008E), 0x01)); in idiv64()
666 body.instructions = f0087_parent_instructions; in idiv64()
667 body.emit(f0087); in idiv64()
671 body.emit(assign(r006B, add(r006B, body.constant(int(-1))), 0x01)); in idiv64()
675 body.instructions = f0084_parent_instructions; in idiv64()
676 body.emit(f0084); in idiv64()
681 exec_list *const f008F_parent_instructions = body.instructions; in idiv64()
684 body.instructions = &f008F->then_instructions; in idiv64()
686 body.emit(assign(r006C, sub(r006C, r0083), 0x01)); in idiv64()
688 body.emit(assign(r006E, bit_or(swizzle_x(r006E), body.constant(1u)), 0x01)); in idiv64()
691 body.instructions = f008F_parent_instructions; in idiv64()
692 body.emit(f008F); in idiv64()
696 ir_variable *const r0091 = body.make_temp(glsl_type::ivec2_type, "conditional_tmp"); in idiv64()
699 exec_list *const f0092_parent_instructions = body.instructions; in idiv64()
702 body.instructions = &f0092->then_instructions; in idiv64()
707 body.emit(assign(r0091, expr(ir_unop_unpack_int_2x32, r0095), 0x03)); in idiv64()
711 body.instructions = &f0092->else_instructions; in idiv64()
713 body.emit(assign(r0091, expr(ir_unop_u2i, r006E), 0x03)); in idiv64()
716 body.instructions = f0092_parent_instructions; in idiv64()
717 body.emit(f0092); in idiv64()
721 body.emit(ret(r0091)); in idiv64()
731 ir_factory body(&sig->body, mem_ctx); in umod64()
740 ir_variable *const r0098 = body.make_temp(glsl_type::uvec2_type, "n"); in umod64()
741 body.emit(assign(r0098, r0096, 0x03)); in umod64()
744 body.emit(r0099); in umod64()
746 body.emit(r009A); in umod64()
748 body.emit(r009B); in umod64()
750 body.emit(r009C); in umod64()
751 body.emit(assign(r009C, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03)); in umod64()
754 body.emit(assign(r009B, add(r009D, body.constant(int(32))), 0x01)); in umod64()
757 ir_expression *const r009F = equal(swizzle_y(r0097), body.constant(0u)); in umod64()
761 exec_list *const f009E_parent_instructions = body.instructions; in umod64()
764 body.instructions = &f009E->then_instructions; in umod64()
767 body.emit(r00A2); in umod64()
768 ir_variable *const r00A3 = body.make_temp(glsl_type::int_type, "findMSB_retval"); in umod64()
769 body.emit(assign(r00A3, expr(ir_unop_find_msb, swizzle_x(r0097)), 0x01)); in umod64()
771 body.emit(assign(r009B, r00A3, 0x01)); in umod64()
773 body.emit(assign(r00A2, body.constant(int(31)), 0x01)); in umod64()
777 exec_list *const f00A4_parent_instructions = body.instructions; in umod64()
779 body.instructions = &f00A4->body_instructions; in umod64()
782 ir_expression *const r00A6 = less(r00A2, body.constant(int(1))); in umod64()
784 exec_list *const f00A5_parent_instructions = body.instructions; in umod64()
787 body.instructions = &f00A5->then_instructions; in umod64()
789 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in umod64()
792 body.instructions = f00A5_parent_instructions; in umod64()
793 body.emit(f00A5); in umod64()
798 ir_expression *const r00A8 = sub(body.constant(int(31)), r00A2); in umod64()
804 exec_list *const f00A7_parent_instructions = body.instructions; in umod64()
807 body.instructions = &f00A7->then_instructions; in umod64()
810 body.emit(assign(r0098, sub(swizzle_y(r0098), r00AD), 0x02)); in umod64()
812 ir_expression *const r00AE = lshift(body.constant(1u), r00A2); in umod64()
813 body.emit(assign(r009C, bit_or(swizzle_y(r009C), r00AE), 0x02)); in umod64()
816 body.instructions = f00A7_parent_instructions; in umod64()
817 body.emit(f00A7); in umod64()
821 body.emit(assign(r00A2, add(r00A2, body.constant(int(-1))), 0x01)); in umod64()
825 body.instructions = f00A4_parent_instructions; in umod64()
826 body.emit(f00A4); in umod64()
831 exec_list *const f00AF_parent_instructions = body.instructions; in umod64()
834 body.instructions = &f00AF->then_instructions; in umod64()
836 body.emit(assign(r0098, sub(swizzle_y(r0098), swizzle_x(r0097)), 0x02)); in umod64()
838 body.emit(assign(r009C, bit_or(swizzle_y(r009C), body.constant(1u)), 0x02)); in umod64()
841 body.instructions = f00AF_parent_instructions; in umod64()
842 body.emit(f00AF); in umod64()
847 body.instructions = f009E_parent_instructions; in umod64()
848 body.emit(f009E); in umod64()
852 ir_variable *const r00B1 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval"); in umod64()
853 body.emit(assign(r00B1, expr(ir_unop_pack_uint_2x32, r0097), 0x01)); in umod64()
855 body.emit(assign(r009A, expr(ir_unop_pack_uint_2x32, r0098), 0x01)); in umod64()
857 body.emit(assign(r0099, body.constant(int(31)), 0x01)); in umod64()
861 exec_list *const f00B2_parent_instructions = body.instructions; in umod64()
863 body.instructions = &f00B2->body_instructions; in umod64()
866 ir_expression *const r00B4 = less(r0099, body.constant(int(1))); in umod64()
868 exec_list *const f00B3_parent_instructions = body.instructions; in umod64()
871 body.instructions = &f00B3->then_instructions; in umod64()
873 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in umod64()
876 body.instructions = f00B3_parent_instructions; in umod64()
877 body.emit(f00B3); in umod64()
882 ir_expression *const r00B6 = sub(body.constant(int(63)), r0099); in umod64()
888 exec_list *const f00B5_parent_instructions = body.instructions; in umod64()
891 body.instructions = &f00B5->then_instructions; in umod64()
894 body.emit(assign(r009A, sub(r009A, r00BB), 0x01)); in umod64()
896 ir_expression *const r00BC = lshift(body.constant(1u), r0099); in umod64()
897 body.emit(assign(r009C, bit_or(swizzle_x(r009C), r00BC), 0x01)); in umod64()
900 body.instructions = f00B5_parent_instructions; in umod64()
901 body.emit(f00B5); in umod64()
905 body.emit(assign(r0099, add(r0099, body.constant(int(-1))), 0x01)); in umod64()
909 body.instructions = f00B2_parent_instructions; in umod64()
910 body.emit(f00B2); in umod64()
915 exec_list *const f00BD_parent_instructions = body.instructions; in umod64()
918 body.instructions = &f00BD->then_instructions; in umod64()
920 body.emit(assign(r009A, sub(r009A, r00B1), 0x01)); in umod64()
922 body.emit(assign(r009C, bit_or(swizzle_x(r009C), body.constant(1u)), 0x01)); in umod64()
925 body.instructions = f00BD_parent_instructions; in umod64()
926 body.emit(f00BD); in umod64()
930 ir_variable *const r00BF = body.make_temp(glsl_type::uvec4_type, "vec_ctor"); in umod64()
931 body.emit(assign(r00BF, r009C, 0x03)); in umod64()
933 body.emit(assign(r00BF, expr(ir_unop_unpack_uint_2x32, r009A), 0x0c)); in umod64()
936 body.emit(ret(r00C0)); in umod64()
946 ir_factory body(&sig->body, mem_ctx); in imod64()
956 body.emit(r00C3); in imod64()
957 ir_expression *const r00C4 = less(swizzle_y(r00C1), body.constant(int(0))); in imod64()
958 ir_expression *const r00C5 = less(swizzle_y(r00C2), body.constant(int(0))); in imod64()
959 body.emit(assign(r00C3, nequal(r00C4, r00C5), 0x01)); in imod64()
961 ir_variable *const r00C6 = body.make_temp(glsl_type::uvec2_type, "n"); in imod64()
965 body.emit(assign(r00C6, expr(ir_unop_unpack_uint_2x32, r00C9), 0x03)); in imod64()
967 ir_variable *const r00CA = body.make_temp(glsl_type::uvec2_type, "d"); in imod64()
971 body.emit(assign(r00CA, expr(ir_unop_unpack_uint_2x32, r00CD), 0x03)); in imod64()
974 body.emit(r00CE); in imod64()
976 body.emit(r00CF); in imod64()
978 body.emit(r00D0); in imod64()
980 body.emit(r00D1); in imod64()
981 body.emit(assign(r00D1, ir_constant::zero(mem_ctx, glsl_type::uvec2_type), 0x03)); in imod64()
984 body.emit(assign(r00D0, add(r00D2, body.constant(int(32))), 0x01)); in imod64()
987 ir_expression *const r00D4 = equal(swizzle_y(r00CA), body.constant(0u)); in imod64()
991 exec_list *const f00D3_parent_instructions = body.instructions; in imod64()
994 body.instructions = &f00D3->then_instructions; in imod64()
997 body.emit(r00D7); in imod64()
998 ir_variable *const r00D8 = body.make_temp(glsl_type::int_type, "findMSB_retval"); in imod64()
999 body.emit(assign(r00D8, expr(ir_unop_find_msb, swizzle_x(r00CA)), 0x01)); in imod64()
1001 body.emit(assign(r00D0, r00D8, 0x01)); in imod64()
1003 body.emit(assign(r00D7, body.constant(int(31)), 0x01)); in imod64()
1007 exec_list *const f00D9_parent_instructions = body.instructions; in imod64()
1009 body.instructions = &f00D9->body_instructions; in imod64()
1012 ir_expression *const r00DB = less(r00D7, body.constant(int(1))); in imod64()
1014 exec_list *const f00DA_parent_instructions = body.instructions; in imod64()
1017 body.instructions = &f00DA->then_instructions; in imod64()
1019 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in imod64()
1022 body.instructions = f00DA_parent_instructions; in imod64()
1023 body.emit(f00DA); in imod64()
1028 ir_expression *const r00DD = sub(body.constant(int(31)), r00D7); in imod64()
1034 exec_list *const f00DC_parent_instructions = body.instructions; in imod64()
1037 body.instructions = &f00DC->then_instructions; in imod64()
1040 body.emit(assign(r00C6, sub(swizzle_y(r00C6), r00E2), 0x02)); in imod64()
1042 ir_expression *const r00E3 = lshift(body.constant(1u), r00D7); in imod64()
1043 body.emit(assign(r00D1, bit_or(swizzle_y(r00D1), r00E3), 0x02)); in imod64()
1046 body.instructions = f00DC_parent_instructions; in imod64()
1047 body.emit(f00DC); in imod64()
1051 body.emit(assign(r00D7, add(r00D7, body.constant(int(-1))), 0x01)); in imod64()
1055 body.instructions = f00D9_parent_instructions; in imod64()
1056 body.emit(f00D9); in imod64()
1061 exec_list *const f00E4_parent_instructions = body.instructions; in imod64()
1064 body.instructions = &f00E4->then_instructions; in imod64()
1066 body.emit(assign(r00C6, sub(swizzle_y(r00C6), swizzle_x(r00CA)), 0x02)); in imod64()
1068 body.emit(assign(r00D1, bit_or(swizzle_y(r00D1), body.constant(1u)), 0x02)); in imod64()
1071 body.instructions = f00E4_parent_instructions; in imod64()
1072 body.emit(f00E4); in imod64()
1077 body.instructions = f00D3_parent_instructions; in imod64()
1078 body.emit(f00D3); in imod64()
1082 ir_variable *const r00E6 = body.make_temp(glsl_type::uint64_t_type, "packUint2x32_retval"); in imod64()
1083 body.emit(assign(r00E6, expr(ir_unop_pack_uint_2x32, r00CA), 0x01)); in imod64()
1085 body.emit(assign(r00CF, expr(ir_unop_pack_uint_2x32, r00C6), 0x01)); in imod64()
1087 body.emit(assign(r00CE, body.constant(int(31)), 0x01)); in imod64()
1091 exec_list *const f00E7_parent_instructions = body.instructions; in imod64()
1093 body.instructions = &f00E7->body_instructions; in imod64()
1096 ir_expression *const r00E9 = less(r00CE, body.constant(int(1))); in imod64()
1098 exec_list *const f00E8_parent_instructions = body.instructions; in imod64()
1101 body.instructions = &f00E8->then_instructions; in imod64()
1103 body.emit(new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break)); in imod64()
1106 body.instructions = f00E8_parent_instructions; in imod64()
1107 body.emit(f00E8); in imod64()
1112 ir_expression *const r00EB = sub(body.constant(int(63)), r00CE); in imod64()
1118 exec_list *const f00EA_parent_instructions = body.instructions; in imod64()
1121 body.instructions = &f00EA->then_instructions; in imod64()
1124 body.emit(assign(r00CF, sub(r00CF, r00F0), 0x01)); in imod64()
1126 ir_expression *const r00F1 = lshift(body.constant(1u), r00CE); in imod64()
1127 body.emit(assign(r00D1, bit_or(swizzle_x(r00D1), r00F1), 0x01)); in imod64()
1130 body.instructions = f00EA_parent_instructions; in imod64()
1131 body.emit(f00EA); in imod64()
1135 body.emit(assign(r00CE, add(r00CE, body.constant(int(-1))), 0x01)); in imod64()
1139 body.instructions = f00E7_parent_instructions; in imod64()
1140 body.emit(f00E7); in imod64()
1145 exec_list *const f00F2_parent_instructions = body.instructions; in imod64()
1148 body.instructions = &f00F2->then_instructions; in imod64()
1150 body.emit(assign(r00CF, sub(r00CF, r00E6), 0x01)); in imod64()
1152 body.emit(assign(r00D1, bit_or(swizzle_x(r00D1), body.constant(1u)), 0x01)); in imod64()
1155 body.instructions = f00F2_parent_instructions; in imod64()
1156 body.emit(f00F2); in imod64()
1160 ir_variable *const r00F4 = body.make_temp(glsl_type::uvec4_type, "vec_ctor"); in imod64()
1161 body.emit(assign(r00F4, r00D1, 0x03)); in imod64()
1163 body.emit(assign(r00F4, expr(ir_unop_unpack_uint_2x32, r00CF), 0x0c)); in imod64()
1165 ir_variable *const r00F5 = body.make_temp(glsl_type::ivec2_type, "conditional_tmp"); in imod64()
1168 exec_list *const f00F6_parent_instructions = body.instructions; in imod64()
1171 body.instructions = &f00F6->then_instructions; in imod64()
1177 body.emit(assign(r00F5, expr(ir_unop_unpack_int_2x32, r00FA), 0x03)); in imod64()
1181 body.instructions = &f00F6->else_instructions; in imod64()
1184 body.emit(assign(r00F5, expr(ir_unop_u2i, r00FB), 0x03)); in imod64()
1187 body.instructions = f00F6_parent_instructions; in imod64()
1188 body.emit(f00F6); in imod64()
1192 body.emit(ret(r00F5)); in imod64()