Lines Matching refs:rctx
108 struct r600_context *rctx = NULL; in evergreen_set_rat() local
114 rctx = pipe->ctx; in evergreen_set_rat()
116 COMPUTE_DBG(rctx->screen, "bind rat: %i \n", id); in evergreen_set_rat()
141 evergreen_init_color_surface_rat(rctx, surf); in evergreen_set_rat()
144 static void evergreen_cs_set_vertex_buffer(struct r600_context *rctx, in evergreen_cs_set_vertex_buffer() argument
149 struct r600_vertexbuf_state *state = &rctx->cs_vertex_buffer_state; in evergreen_cs_set_vertex_buffer()
158 rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE; in evergreen_cs_set_vertex_buffer()
161 r600_mark_atom_dirty(rctx, &state->atom); in evergreen_cs_set_vertex_buffer()
164 static void evergreen_cs_set_constant_buffer(struct r600_context *rctx, in evergreen_cs_set_constant_buffer() argument
176 rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_COMPUTE, cb_index, &cb); in evergreen_cs_set_constant_buffer()
409 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_create_compute_state() local
418 shader->ctx = rctx; in evergreen_create_compute_state()
430 COMPUTE_DBG(rctx->screen, "*** evergreen_create_compute_state\n"); in evergreen_create_compute_state()
438 shader->code_bo = r600_compute_buffer_alloc_vram(rctx->screen, in evergreen_create_compute_state()
440 p = r600_buffer_map_sync_with_rings(&rctx->b, shader->code_bo, PIPE_TRANSFER_WRITE); in evergreen_create_compute_state()
443 rctx->b.ws->buffer_unmap(shader->code_bo->buf); in evergreen_create_compute_state()
451 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_delete_compute_state() local
454 COMPUTE_DBG(rctx->screen, "*** evergreen_delete_compute_state\n"); in evergreen_delete_compute_state()
475 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_bind_compute_state() local
477 COMPUTE_DBG(rctx->screen, "*** evergreen_bind_compute_state\n"); in evergreen_bind_compute_state()
480 rctx->cs_shader_state.shader = (struct r600_pipe_compute *)state; in evergreen_bind_compute_state()
490 rctx->cs_shader_state.shader = (struct r600_pipe_compute *)state; in evergreen_bind_compute_state()
507 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_compute_upload_input() local
508 struct r600_pipe_compute *shader = rctx->cs_shader_state.shader; in evergreen_compute_upload_input()
558 COMPUTE_DBG(rctx->screen, "input %i : %u\n", i, in evergreen_compute_upload_input()
567 evergreen_cs_set_vertex_buffer(rctx, 3, 0, in evergreen_compute_upload_input()
569 evergreen_cs_set_constant_buffer(rctx, 0, 0, input_size, in evergreen_compute_upload_input()
573 static void evergreen_emit_dispatch(struct r600_context *rctx, in evergreen_emit_dispatch() argument
577 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in evergreen_emit_dispatch()
578 struct r600_pipe_compute *shader = rctx->cs_shader_state.shader; in evergreen_emit_dispatch()
580 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes; in evergreen_emit_dispatch()
602 COMPUTE_DBG(rctx->screen, "Using %u pipes, " in evergreen_emit_dispatch()
622 if (rctx->b.chip_class < CAYMAN) { in evergreen_emit_dispatch()
641 if (rctx->is_debug) in evergreen_emit_dispatch()
642 eg_trace_emit(rctx); in evergreen_emit_dispatch()
645 static void compute_setup_cbs(struct r600_context *rctx) in compute_setup_cbs() argument
647 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in compute_setup_cbs()
652 for (i = 0; i < 8 && i < rctx->framebuffer.state.nr_cbufs; i++) { in compute_setup_cbs()
653 struct r600_surface *cb = (struct r600_surface*)rctx->framebuffer.state.cbufs[i]; in compute_setup_cbs()
654 unsigned reloc = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, in compute_setup_cbs()
683 rctx->compute_cb_target_mask); in compute_setup_cbs()
686 static void compute_emit_cs(struct r600_context *rctx, in compute_emit_cs() argument
689 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in compute_emit_cs()
696 if (radeon_emitted(rctx->b.dma.cs, 0)) { in compute_emit_cs()
697 rctx->b.dma.flush(rctx, PIPE_FLUSH_ASYNC, NULL); in compute_emit_cs()
700 r600_update_compressed_resource_state(rctx, true); in compute_emit_cs()
702 if (!rctx->cmd_buf_is_compute) { in compute_emit_cs()
703 rctx->b.gfx.flush(rctx, PIPE_FLUSH_ASYNC, NULL); in compute_emit_cs()
704 rctx->cmd_buf_is_compute = true; in compute_emit_cs()
707 r600_need_cs_space(rctx, 0, true); in compute_emit_cs()
708 if (rctx->cs_shader_state.shader->ir_type == PIPE_SHADER_IR_TGSI) { in compute_emit_cs()
709 r600_shader_select(&rctx->b.b, rctx->cs_shader_state.shader->sel, &compute_dirty); in compute_emit_cs()
710 current = rctx->cs_shader_state.shader->sel->current; in compute_emit_cs()
712 rctx->cs_shader_state.atom.num_dw = current->command_buffer.num_dw; in compute_emit_cs()
713 r600_context_add_resource_size(&rctx->b.b, (struct pipe_resource *)current->bo); in compute_emit_cs()
714 r600_set_atom_dirty(rctx, &rctx->cs_shader_state.atom, true); in compute_emit_cs()
721 rctx->cs_block_grid_sizes[i] = info->block[i]; in compute_emit_cs()
722 rctx->cs_block_grid_sizes[i + 4] = info->grid[i]; in compute_emit_cs()
724 rctx->cs_block_grid_sizes[3] = rctx->cs_block_grid_sizes[7] = 0; in compute_emit_cs()
725 rctx->driver_consts[PIPE_SHADER_COMPUTE].cs_block_grid_size_dirty = true; in compute_emit_cs()
727 eg_setup_buffer_constants(rctx, PIPE_SHADER_COMPUTE); in compute_emit_cs()
729 r600_update_driver_const_buffers(rctx, true); in compute_emit_cs()
731 if (evergreen_emit_atomic_buffer_setup(rctx, current, combined_atomics, &atomic_used_mask)) { in compute_emit_cs()
742 r600_emit_command_buffer(cs, &rctx->start_compute_cs_cmd); in compute_emit_cs()
745 if (rctx->b.chip_class == EVERGREEN) { in compute_emit_cs()
746 if (rctx->cs_shader_state.shader->ir_type == PIPE_SHADER_IR_TGSI) { in compute_emit_cs()
748 radeon_emit(cs, S_008C04_NUM_CLAUSE_TEMP_GPRS(rctx->r6xx_num_clause_temp_gprs)); in compute_emit_cs()
753 r600_emit_atom(rctx, &rctx->config_state.atom); in compute_emit_cs()
756 rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV; in compute_emit_cs()
757 r600_flush_emit(rctx); in compute_emit_cs()
759 if (rctx->cs_shader_state.shader->ir_type != PIPE_SHADER_IR_TGSI) { in compute_emit_cs()
761 compute_setup_cbs(rctx); in compute_emit_cs()
764 …rctx->cs_vertex_buffer_state.atom.num_dw = 12 * util_bitcount(rctx->cs_vertex_buffer_state.dirty_m… in compute_emit_cs()
765 r600_emit_atom(rctx, &rctx->cs_vertex_buffer_state.atom); in compute_emit_cs()
769 rat_mask = evergreen_construct_rat_mask(rctx, &rctx->cb_misc_state, 0); in compute_emit_cs()
775 r600_emit_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_COMPUTE].atom); in compute_emit_cs()
778 r600_emit_atom(rctx, &rctx->samplers[PIPE_SHADER_COMPUTE].states.atom); in compute_emit_cs()
781 r600_emit_atom(rctx, &rctx->samplers[PIPE_SHADER_COMPUTE].views.atom); in compute_emit_cs()
784 r600_emit_atom(rctx, &rctx->compute_images.atom); in compute_emit_cs()
787 r600_emit_atom(rctx, &rctx->compute_buffers.atom); in compute_emit_cs()
790 r600_emit_atom(rctx, &rctx->cs_shader_state.atom); in compute_emit_cs()
793 evergreen_emit_dispatch(rctx, info); in compute_emit_cs()
797 rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE | in compute_emit_cs()
800 r600_flush_emit(rctx); in compute_emit_cs()
801 rctx->b.flags = 0; in compute_emit_cs()
803 if (rctx->b.chip_class >= CAYMAN) { in compute_emit_cs()
813 if (rctx->cs_shader_state.shader->ir_type == PIPE_SHADER_IR_TGSI) in compute_emit_cs()
814 evergreen_emit_atomic_buffer_save(rctx, true, combined_atomics, &atomic_used_mask); in compute_emit_cs()
817 COMPUTE_DBG(rctx->screen, "cdw: %i\n", cs->cdw); in compute_emit_cs()
819 COMPUTE_DBG(rctx->screen, "%4i : 0x%08X\n", i, cs->buf[i]); in compute_emit_cs()
829 void evergreen_emit_cs_shader(struct r600_context *rctx, in evergreen_emit_cs_shader() argument
835 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in evergreen_emit_cs_shader()
861 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, in evergreen_emit_cs_shader()
869 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_launch_grid() local
871 struct r600_pipe_compute *shader = rctx->cs_shader_state.shader; in evergreen_launch_grid()
875 rctx->cs_shader_state.pc = info->pc; in evergreen_launch_grid()
881 rctx->cs_shader_state.pc = 0; in evergreen_launch_grid()
885 COMPUTE_DBG(rctx->screen, "*** evergreen_launch_grid: pc = %u\n", info->pc); in evergreen_launch_grid()
889 compute_emit_cs(rctx, info); in evergreen_launch_grid()
896 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_set_compute_resources() local
899 COMPUTE_DBG(rctx->screen, "*** evergreen_set_compute_resources: start = %u count = %u\n", in evergreen_set_compute_resources()
913 evergreen_set_rat(rctx->cs_shader_state.shader, i+1, in evergreen_set_compute_resources()
919 evergreen_cs_set_vertex_buffer(rctx, vtx_id, in evergreen_set_compute_resources()
931 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_set_global_binding() local
932 struct compute_memory_pool *pool = rctx->screen->global_pool; in evergreen_set_global_binding()
937 COMPUTE_DBG(rctx->screen, "*** evergreen_set_global_binding first = %u n = %u\n", in evergreen_set_global_binding()
973 evergreen_set_rat(rctx->cs_shader_state.shader, 0, pool->bo, 0, pool->size_in_dw * 4); in evergreen_set_global_binding()
975 evergreen_cs_set_vertex_buffer(rctx, 1, 0, in evergreen_set_global_binding()
979 evergreen_cs_set_vertex_buffer(rctx, 2, 0, in evergreen_set_global_binding()
980 (struct pipe_resource*)rctx->cs_shader_state.shader->code_bo); in evergreen_set_global_binding()
994 void evergreen_init_atom_start_compute_cs(struct r600_context *rctx) in evergreen_init_atom_start_compute_cs() argument
996 struct r600_command_buffer *cb = &rctx->start_compute_cs_cmd; in evergreen_init_atom_start_compute_cs()
1010 switch (rctx->b.family) { in evergreen_init_atom_start_compute_cs()
1059 if (rctx->b.chip_class < CAYMAN) { in evergreen_init_atom_start_compute_cs()
1109 if (rctx->b.chip_class < CAYMAN) { in evergreen_init_atom_start_compute_cs()
1120 if (rctx->b.chip_class < CAYMAN) { in evergreen_init_atom_start_compute_cs()
1161 void evergreen_init_compute_state_functions(struct r600_context *rctx) in evergreen_init_compute_state_functions() argument
1163 rctx->b.b.create_compute_state = evergreen_create_compute_state; in evergreen_init_compute_state_functions()
1164 rctx->b.b.delete_compute_state = evergreen_delete_compute_state; in evergreen_init_compute_state_functions()
1165 rctx->b.b.bind_compute_state = evergreen_bind_compute_state; in evergreen_init_compute_state_functions()
1167 rctx->b.b.set_compute_resources = evergreen_set_compute_resources; in evergreen_init_compute_state_functions()
1168 rctx->b.b.set_global_binding = evergreen_set_global_binding; in evergreen_init_compute_state_functions()
1169 rctx->b.b.launch_grid = evergreen_launch_grid; in evergreen_init_compute_state_functions()
1180 struct r600_context *rctx = (struct r600_context*)ctx; in r600_compute_global_transfer_map() local
1181 struct compute_memory_pool *pool = rctx->screen->global_pool; in r600_compute_global_transfer_map()
1204 COMPUTE_DBG(rctx->screen, "* r600_compute_global_transfer_map()\n" in r600_compute_global_transfer_map()
1209 COMPUTE_DBG(rctx->screen, "Buffer id = %"PRIi64" offset = " in r600_compute_global_transfer_map()