Lines Matching refs:rtex
172 static unsigned r600_tex_dim(struct r600_texture *rtex, in r600_tex_dim() argument
175 unsigned res_target = rtex->resource.b.b.target; in r600_tex_dim()
1100 struct r600_texture *rtex, in evergreen_set_color_surface_common() argument
1115 color->offset = rtex->surface.u.legacy.level[level].offset; in evergreen_set_color_surface_common()
1119 color->offset += rtex->resource.gpu_address; in evergreen_set_color_surface_common()
1123 pitch = (rtex->surface.u.legacy.level[level].nblk_x) / 8 - 1; in evergreen_set_color_surface_common()
1124 …slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) … in evergreen_set_color_surface_common()
1130 switch (rtex->surface.u.legacy.level[level].mode) { in evergreen_set_color_surface_common()
1138 non_disp_tiling = rtex->non_disp_tiling; in evergreen_set_color_surface_common()
1142 non_disp_tiling = rtex->non_disp_tiling; in evergreen_set_color_surface_common()
1145 tile_split = rtex->surface.u.legacy.tile_split; in evergreen_set_color_surface_common()
1146 macro_aspect = rtex->surface.u.legacy.mtilea; in evergreen_set_color_surface_common()
1147 bankw = rtex->surface.u.legacy.bankw; in evergreen_set_color_surface_common()
1148 bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1149 if (rtex->fmask.size) in evergreen_set_color_surface_common()
1150 fmask_bankh = rtex->fmask.bank_height; in evergreen_set_color_surface_common()
1152 fmask_bankh = rtex->surface.u.legacy.bankh; in evergreen_set_color_surface_common()
1182 if (rtex->resource.b.b.nr_samples > 1) { in evergreen_set_color_surface_common()
1183 unsigned log_samples = util_logbase2(rtex->resource.b.b.nr_samples); in evergreen_set_color_surface_common()
1207 do_endian_swap = !rtex->db_compatible; in evergreen_set_color_surface_common()
1239 if (rtex->fmask.size) { in evergreen_set_color_surface_common()
1263 if (rtex->fmask.size) { in evergreen_set_color_surface_common()
1264 color->fmask = (rtex->resource.gpu_address + rtex->fmask.offset) >> 8; in evergreen_set_color_surface_common()
1265 color->fmask_slice = S_028C88_TILE_MAX(rtex->fmask.slice_tile_max); in evergreen_set_color_surface_common()
1308 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture; in evergreen_init_color_surface() local
1312 evergreen_set_color_surface_common(rctx, rtex, level, in evergreen_init_color_surface()
1340 struct r600_texture *rtex = (struct r600_texture*)surf->base.texture; in evergreen_init_depth_surface() local
1342 struct legacy_surf_level *levelinfo = &rtex->surface.u.legacy.level[level]; in evergreen_init_depth_surface()
1351 offset = rtex->resource.gpu_address; in evergreen_init_depth_surface()
1352 offset += rtex->surface.u.legacy.level[level].offset; in evergreen_init_depth_surface()
1354 switch (rtex->surface.u.legacy.level[level].mode) { in evergreen_init_depth_surface()
1364 tile_split = rtex->surface.u.legacy.tile_split; in evergreen_init_depth_surface()
1365 macro_aspect = rtex->surface.u.legacy.mtilea; in evergreen_init_depth_surface()
1366 bankw = rtex->surface.u.legacy.bankw; in evergreen_init_depth_surface()
1367 bankh = rtex->surface.u.legacy.bankh; in evergreen_init_depth_surface()
1382 if (rscreen->b.chip_class == CAYMAN && rtex->resource.b.b.nr_samples > 1) { in evergreen_init_depth_surface()
1383 surf->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(rtex->resource.b.b.nr_samples)); in evergreen_init_depth_surface()
1396 if (rtex->surface.has_stencil) { in evergreen_init_depth_surface()
1398 unsigned stile_split = rtex->surface.u.legacy.stencil_tile_split; in evergreen_init_depth_surface()
1402 stencil_offset = rtex->surface.u.legacy.stencil_level[level].offset; in evergreen_init_depth_surface()
1403 stencil_offset += rtex->resource.gpu_address; in evergreen_init_depth_surface()
1417 if (r600_htile_enabled(rtex, level)) { in evergreen_init_depth_surface()
1418 uint64_t va = rtex->resource.gpu_address + rtex->htile_offset; in evergreen_init_depth_surface()
1435 struct r600_texture *rtex; in evergreen_set_framebuffer_state() local
1464 rtex = (struct r600_texture*)surf->base.texture; in evergreen_set_framebuffer_state()
1476 if (rtex->fmask.size) { in evergreen_set_framebuffer_state()
1695 struct r600_texture *rtex; in evergreen_emit_image_state() local
1711 rtex = (struct r600_texture *)image->base.resource; in evergreen_emit_image_state()
1713 rtex = NULL; in evergreen_emit_image_state()
1739 …radeon_emit(cs, rtex ? rtex->cmask.base_address_reg : image->cb_color_base); /* R_028C7C_CB_COLOR0… in evergreen_emit_image_state()
1740 radeon_emit(cs, rtex ? rtex->cmask.slice_tile_max : 0); /* R_028C80_CB_COLOR0_CMASK_SLICE */ in evergreen_emit_image_state()
1743 radeon_emit(cs, rtex ? rtex->color_clear_value[0] : 0); /* R_028C8C_CB_COLOR0_CLEAR_WORD0 */ in evergreen_emit_image_state()
1744 radeon_emit(cs, rtex ? rtex->color_clear_value[1] : 0); /* R_028C90_CB_COLOR0_CLEAR_WORD1 */ in evergreen_emit_image_state()
2043 struct r600_texture *rtex = (struct r600_texture *)a->rsurf->base.texture; in evergreen_emit_db_state() local
2046 radeon_set_context_reg(cs, R_02802C_DB_DEPTH_CLEAR, fui(rtex->depth_clear_value)); in evergreen_emit_db_state()
2050 reloc_idx = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, &rtex->resource, in evergreen_emit_db_state()
4119 struct r600_texture *rtex = (struct r600_texture *)image; in evergreen_set_shader_images() local
4120 if (!is_buffer & rtex->db_compatible) in evergreen_set_shader_images()
4125 if (!is_buffer && rtex->cmask.size) in evergreen_set_shader_images()
4131 evergreen_set_color_surface_common(rctx, rtex, in evergreen_set_shader_images()