Lines Matching refs:rctx
246 static void r600_emit_polygon_offset(struct r600_context *rctx, struct r600_atom *a) in r600_emit_polygon_offset() argument
248 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_polygon_offset()
317 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_blend_state_mode() local
329 if (rctx->b.family > CHIP_R600) in r600_create_blend_state_mode()
386 if (rctx->b.family > CHIP_R600) { in r600_create_blend_state_mode()
458 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_rs_state() local
484 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
508 S_028A4C_PS_ITER_SAMPLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state()
509 if (rctx->b.family == CHIP_RV770) { in r600_create_rs_state()
511 sc_mode_cntl |= S_028A4C_TILE_COVER_DISABLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state()
513 if (rctx->b.chip_class >= R700) { in r600_create_rs_state()
562 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
565 if (rctx->b.chip_class == R600) { in r600_create_rs_state()
792 static void r600_emit_clip_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_clip_state() argument
794 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_clip_state()
795 struct pipe_clip_state *state = &rctx->clip_state.state; in r600_emit_clip_state()
806 static void r600_init_color_surface(struct r600_context *rctx, in r600_init_color_surface() argument
810 struct r600_screen *rscreen = rctx->screen; in r600_init_color_surface()
823 r600_init_flushed_depth_texture(&rctx->b.b, surf->base.texture, NULL); in r600_init_color_surface()
879 format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format, in r600_init_color_surface()
915 if (rctx->b.chip_class == R600) { in r600_init_color_surface()
984 if (!rctx->dummy_cmask || in r600_init_color_surface()
985 rctx->dummy_cmask->b.b.width0 < cmask.size || in r600_init_color_surface()
986 rctx->dummy_cmask->buf->alignment % cmask.alignment != 0) { in r600_init_color_surface()
990 r600_resource_reference(&rctx->dummy_cmask, NULL); in r600_init_color_surface()
991 rctx->dummy_cmask = (struct r600_resource*) in r600_init_color_surface()
996 if (unlikely(!rctx->dummy_cmask)) { in r600_init_color_surface()
1002 ptr = pipe_buffer_map(&rctx->b.b, &rctx->dummy_cmask->b.b, PIPE_TRANSFER_WRITE, &transfer); in r600_init_color_surface()
1004 pipe_buffer_unmap(&rctx->b.b, transfer); in r600_init_color_surface()
1006 r600_resource_reference(&surf->cb_buffer_cmask, rctx->dummy_cmask); in r600_init_color_surface()
1009 if (!rctx->dummy_fmask || in r600_init_color_surface()
1010 rctx->dummy_fmask->b.b.width0 < fmask.size || in r600_init_color_surface()
1011 rctx->dummy_fmask->buf->alignment % fmask.alignment != 0) { in r600_init_color_surface()
1012 r600_resource_reference(&rctx->dummy_fmask, NULL); in r600_init_color_surface()
1013 rctx->dummy_fmask = (struct r600_resource*) in r600_init_color_surface()
1018 if (unlikely(!rctx->dummy_fmask)) { in r600_init_color_surface()
1023 r600_resource_reference(&surf->cb_buffer_fmask, rctx->dummy_fmask); in r600_init_color_surface()
1038 static void r600_init_depth_surface(struct r600_context *rctx, in r600_init_depth_surface() argument
1087 struct r600_context *rctx = (struct r600_context *)ctx; in r600_set_framebuffer_state() local
1096 rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE | in r600_set_framebuffer_state()
1105 util_copy_framebuffer_state(&rctx->framebuffer.state, state); in r600_set_framebuffer_state()
1107 rctx->framebuffer.export_16bpc = state->nr_cbufs != 0; in r600_set_framebuffer_state()
1108 rctx->framebuffer.cb0_is_integer = state->nr_cbufs && state->cbufs[0] && in r600_set_framebuffer_state()
1110 rctx->framebuffer.compressed_cb_mask = 0; in r600_set_framebuffer_state()
1111 rctx->framebuffer.is_msaa_resolve = state->nr_cbufs == 2 && in r600_set_framebuffer_state()
1115 rctx->framebuffer.nr_samples = util_framebuffer_get_num_samples(state); in r600_set_framebuffer_state()
1120 bool force_cmask_fmask = rctx->b.chip_class == R600 && in r600_set_framebuffer_state()
1121 rctx->framebuffer.is_msaa_resolve && in r600_set_framebuffer_state()
1132 r600_init_color_surface(rctx, surf, force_cmask_fmask); in r600_set_framebuffer_state()
1140 rctx->framebuffer.export_16bpc = false; in r600_set_framebuffer_state()
1144 rctx->framebuffer.compressed_cb_mask |= 1 << i; in r600_set_framebuffer_state()
1158 if (rctx->alphatest_state.bypass != alphatest_bypass) { in r600_set_framebuffer_state()
1159 rctx->alphatest_state.bypass = alphatest_bypass; in r600_set_framebuffer_state()
1160 r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); in r600_set_framebuffer_state()
1171 r600_init_depth_surface(rctx, surf); in r600_set_framebuffer_state()
1174 if (state->zsbuf->format != rctx->poly_offset_state.zs_format) { in r600_set_framebuffer_state()
1175 rctx->poly_offset_state.zs_format = state->zsbuf->format; in r600_set_framebuffer_state()
1176 r600_mark_atom_dirty(rctx, &rctx->poly_offset_state.atom); in r600_set_framebuffer_state()
1179 if (rctx->db_state.rsurf != surf) { in r600_set_framebuffer_state()
1180 rctx->db_state.rsurf = surf; in r600_set_framebuffer_state()
1181 r600_mark_atom_dirty(rctx, &rctx->db_state.atom); in r600_set_framebuffer_state()
1182 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_set_framebuffer_state()
1184 } else if (rctx->db_state.rsurf) { in r600_set_framebuffer_state()
1185 rctx->db_state.rsurf = NULL; in r600_set_framebuffer_state()
1186 r600_mark_atom_dirty(rctx, &rctx->db_state.atom); in r600_set_framebuffer_state()
1187 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_set_framebuffer_state()
1190 if (rctx->cb_misc_state.nr_cbufs != state->nr_cbufs) { in r600_set_framebuffer_state()
1191 rctx->cb_misc_state.nr_cbufs = state->nr_cbufs; in r600_set_framebuffer_state()
1192 r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); in r600_set_framebuffer_state()
1195 if (state->nr_cbufs == 0 && rctx->alphatest_state.bypass) { in r600_set_framebuffer_state()
1196 rctx->alphatest_state.bypass = false; in r600_set_framebuffer_state()
1197 r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); in r600_set_framebuffer_state()
1201 rctx->framebuffer.atom.num_dw = in r600_set_framebuffer_state()
1204 if (rctx->framebuffer.state.nr_cbufs) { in r600_set_framebuffer_state()
1205 rctx->framebuffer.atom.num_dw += 15 * rctx->framebuffer.state.nr_cbufs; in r600_set_framebuffer_state()
1206 rctx->framebuffer.atom.num_dw += 3 * (2 + rctx->framebuffer.state.nr_cbufs); in r600_set_framebuffer_state()
1208 if (rctx->framebuffer.state.zsbuf) { in r600_set_framebuffer_state()
1209 rctx->framebuffer.atom.num_dw += 16; in r600_set_framebuffer_state()
1210 } else if (rctx->screen->b.info.drm_minor >= 18) { in r600_set_framebuffer_state()
1211 rctx->framebuffer.atom.num_dw += 3; in r600_set_framebuffer_state()
1213 if (rctx->b.family > CHIP_R600 && rctx->b.family < CHIP_RV770) { in r600_set_framebuffer_state()
1214 rctx->framebuffer.atom.num_dw += 2; in r600_set_framebuffer_state()
1217 r600_mark_atom_dirty(rctx, &rctx->framebuffer.atom); in r600_set_framebuffer_state()
1219 r600_set_sample_locations_constant_buffer(rctx); in r600_set_framebuffer_state()
1220 rctx->framebuffer.do_update_surf_dirtiness = true; in r600_set_framebuffer_state()
1279 static void r600_emit_msaa_state(struct r600_context *rctx, int nr_samples) in r600_emit_msaa_state() argument
1281 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_msaa_state()
1284 if (rctx->b.family == CHIP_R600) { in r600_emit_msaa_state()
1346 static void r600_emit_framebuffer_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_framebuffer_state() argument
1348 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_framebuffer_state()
1349 struct pipe_framebuffer_state *state = &rctx->framebuffer.state; in r600_emit_framebuffer_state()
1360 if (rctx->framebuffer.dual_src_blend && i == 1 && cb[0]) { in r600_emit_framebuffer_state()
1378 reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1379 &rctx->b.gfx, in r600_emit_framebuffer_state()
1391 reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1392 &rctx->b.gfx, in r600_emit_framebuffer_state()
1404 reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1405 &rctx->b.gfx, in r600_emit_framebuffer_state()
1434 if (rctx->b.family > CHIP_R600 && rctx->b.family < CHIP_RV770 && sbu) { in r600_emit_framebuffer_state()
1443 unsigned reloc = radeon_add_to_buffer_list(&rctx->b, in r600_emit_framebuffer_state()
1444 &rctx->b.gfx, in r600_emit_framebuffer_state()
1464 } else if (rctx->screen->b.info.drm_minor >= 18) { in r600_emit_framebuffer_state()
1471 if (rctx->b.family > CHIP_R600 && rctx->b.family < CHIP_RV770 && sbu) { in r600_emit_framebuffer_state()
1484 if (rctx->framebuffer.is_msaa_resolve) { in r600_emit_framebuffer_state()
1494 r600_emit_msaa_state(rctx, rctx->framebuffer.nr_samples); in r600_emit_framebuffer_state()
1499 struct r600_context *rctx = (struct r600_context *)ctx; in r600_set_min_samples() local
1501 if (rctx->ps_iter_samples == min_samples) in r600_set_min_samples()
1504 rctx->ps_iter_samples = min_samples; in r600_set_min_samples()
1505 if (rctx->framebuffer.nr_samples > 1) { in r600_set_min_samples()
1506 r600_mark_atom_dirty(rctx, &rctx->rasterizer_state.atom); in r600_set_min_samples()
1507 if (rctx->b.chip_class == R600) in r600_set_min_samples()
1508 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_set_min_samples()
1512 static void r600_emit_cb_misc_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_cb_misc_state() argument
1514 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_cb_misc_state()
1519 if (rctx->b.chip_class == R600) { in r600_emit_cb_misc_state()
1542 static void r600_emit_db_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_db_state() argument
1544 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_db_state()
1554 reloc_idx = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, &rtex->resource, in r600_emit_db_state()
1563 static void r600_emit_db_misc_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_db_misc_state() argument
1565 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_db_misc_state()
1572 if (rctx->b.chip_class >= R700) { in r600_emit_db_misc_state()
1587 if (rctx->b.num_occlusion_queries > 0 && in r600_emit_db_misc_state()
1589 if (rctx->b.chip_class >= R700) { in r600_emit_db_misc_state()
1597 if (rctx->db_state.rsurf && rctx->db_state.rsurf->db_htile_surface) { in r600_emit_db_misc_state()
1604 if (rctx->alphatest_state.sx_alpha_test_control) { in r600_emit_db_misc_state()
1610 if (rctx->b.chip_class == R600 && rctx->framebuffer.nr_samples > 1 && rctx->ps_iter_samples > 0) { in r600_emit_db_misc_state()
1622 if (rctx->b.chip_class == R600) in r600_emit_db_misc_state()
1625 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 || in r600_emit_db_misc_state()
1626 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635) in r600_emit_db_misc_state()
1638 if (rctx->b.family == CHIP_RV770 && a->log_samples == 3) { in r600_emit_db_misc_state()
1648 static void r600_emit_config_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_config_state() argument
1650 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_config_state()
1657 static void r600_emit_vertex_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vertex_buffers() argument
1659 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_vertex_buffers()
1660 uint32_t dirty_mask = rctx->vertex_buffer_state.dirty_mask; in r600_emit_vertex_buffers()
1668 vb = &rctx->vertex_buffer_state.vb[buffer_index]; in r600_emit_vertex_buffers()
1688 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_vertex_buffers()
1693 static void r600_emit_constant_buffers(struct r600_context *rctx, in r600_emit_constant_buffers() argument
1699 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_constant_buffers()
1720 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_constant_buffers()
1737 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_constant_buffers()
1745 static void r600_emit_vs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vs_constant_buffers() argument
1747 r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX], in r600_emit_vs_constant_buffers()
1753 static void r600_emit_gs_constant_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_gs_constant_buffers() argument
1755 r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY], in r600_emit_gs_constant_buffers()
1761 static void r600_emit_ps_constant_buffers(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_ps_constant_buffers() argument
1763 r600_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT], in r600_emit_ps_constant_buffers()
1769 static void r600_emit_sampler_views(struct r600_context *rctx, in r600_emit_sampler_views() argument
1773 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_sampler_views()
1788 reloc = radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rview->tex_resource, in r600_emit_sampler_views()
1800 static void r600_emit_vs_sampler_views(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vs_sampler_views() argument
1802 …r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views, R600_FETCH_CONSTANTS_OFFS… in r600_emit_vs_sampler_views()
1805 static void r600_emit_gs_sampler_views(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_gs_sampler_views() argument
1807 …r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views, R600_FETCH_CONSTANTS_OF… in r600_emit_gs_sampler_views()
1810 static void r600_emit_ps_sampler_views(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_ps_sampler_views() argument
1812 …r600_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views, R600_FETCH_CONSTANTS_OF… in r600_emit_ps_sampler_views()
1815 static void r600_emit_sampler_states(struct r600_context *rctx, in r600_emit_sampler_states() argument
1820 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_sampler_states()
1864 static void r600_emit_vs_sampler_states(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_vs_sampler_states() argument
1866 …r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_VERTEX], 18, R_00A600_TD_VS_SAMPLER0_BO… in r600_emit_vs_sampler_states()
1869 static void r600_emit_gs_sampler_states(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_gs_sampler_states() argument
1871 …r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY], 36, R_00A800_TD_GS_SAMPLER0_… in r600_emit_gs_sampler_states()
1874 static void r600_emit_ps_sampler_states(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_ps_sampler_states() argument
1876 …r600_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT], 0, R_00A400_TD_PS_SAMPLER0_B… in r600_emit_ps_sampler_states()
1879 static void r600_emit_seamless_cube_map(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_seamless_cube_map() argument
1881 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_seamless_cube_map()
1888 if (!rctx->seamless_cube_map.enabled) { in r600_emit_seamless_cube_map()
1894 static void r600_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a) in r600_emit_sample_mask() argument
1899 radeon_set_context_reg(rctx->b.gfx.cs, R_028C48_PA_SC_AA_MASK, in r600_emit_sample_mask()
1903 static void r600_emit_vertex_fetch_shader(struct r600_context *rctx, struct r600_atom *a) in r600_emit_vertex_fetch_shader() argument
1905 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_vertex_fetch_shader()
1914 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer, in r600_emit_vertex_fetch_shader()
1919 static void r600_emit_shader_stages(struct r600_context *rctx, struct r600_atom *a) in r600_emit_shader_stages() argument
1921 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_shader_stages()
1926 if (rctx->vs_shader->current->shader.vs_as_gs_a) { in r600_emit_shader_stages()
1934 if (rctx->gs_shader->gs_max_out_vertices <= 128) in r600_emit_shader_stages()
1936 else if (rctx->gs_shader->gs_max_out_vertices <= 256) in r600_emit_shader_stages()
1938 else if (rctx->gs_shader->gs_max_out_vertices <= 512) in r600_emit_shader_stages()
1946 if (rctx->gs_shader->current->shader.gs_prim_id_input) in r600_emit_shader_stages()
1954 static void r600_emit_gs_rings(struct r600_context *rctx, struct r600_atom *a) in r600_emit_gs_rings() argument
1956 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_gs_rings()
1968 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_gs_rings()
1977 radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, rbuffer, in r600_emit_gs_rings()
1993 bool r600_adjust_gprs(struct r600_context *rctx) in r600_adjust_gprs() argument
1999 unsigned def_num_clause_temp_gprs = rctx->r6xx_num_clause_temp_gprs; in r600_adjust_gprs()
2008 def_gprs[i] = rctx->default_gprs[i]; in r600_adjust_gprs()
2012 cur_gprs[R600_HW_STAGE_PS] = G_008C04_NUM_PS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_1); in r600_adjust_gprs()
2013 cur_gprs[R600_HW_STAGE_VS] = G_008C04_NUM_VS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_1); in r600_adjust_gprs()
2014 cur_gprs[R600_HW_STAGE_GS] = G_008C08_NUM_GS_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2); in r600_adjust_gprs()
2015 cur_gprs[R600_HW_STAGE_ES] = G_008C08_NUM_ES_GPRS(rctx->config_state.sq_gpr_resource_mgmt_2); in r600_adjust_gprs()
2017 num_gprs[R600_HW_STAGE_PS] = rctx->ps_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2018 if (rctx->gs_shader) { in r600_adjust_gprs()
2019 num_gprs[R600_HW_STAGE_ES] = rctx->vs_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2020 num_gprs[R600_HW_STAGE_GS] = rctx->gs_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2021 num_gprs[R600_HW_STAGE_VS] = rctx->gs_shader->current->gs_copy_shader->shader.bc.ngpr; in r600_adjust_gprs()
2025 num_gprs[R600_HW_STAGE_VS] = rctx->vs_shader->current->shader.bc.ngpr; in r600_adjust_gprs()
2075 …if (rctx->config_state.sq_gpr_resource_mgmt_1 != tmp || rctx->config_state.sq_gpr_resource_mgmt_2 … in r600_adjust_gprs()
2076 rctx->config_state.sq_gpr_resource_mgmt_1 = tmp; in r600_adjust_gprs()
2077 rctx->config_state.sq_gpr_resource_mgmt_2 = tmp2; in r600_adjust_gprs()
2078 r600_mark_atom_dirty(rctx, &rctx->config_state.atom); in r600_adjust_gprs()
2079 rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE; in r600_adjust_gprs()
2084 void r600_init_atom_start_cs(struct r600_context *rctx) in r600_init_atom_start_cs() argument
2104 struct r600_command_buffer *cb = &rctx->start_cs_cmd; in r600_init_atom_start_cs()
2110 if (rctx->b.chip_class == R600) { in r600_init_atom_start_cs()
2129 family = rctx->b.family; in r600_init_atom_start_cs()
2249 rctx->default_gprs[R600_HW_STAGE_PS] = num_ps_gprs; in r600_init_atom_start_cs()
2250 rctx->default_gprs[R600_HW_STAGE_VS] = num_vs_gprs; in r600_init_atom_start_cs()
2251 rctx->default_gprs[R600_HW_STAGE_GS] = 0; in r600_init_atom_start_cs()
2252 rctx->default_gprs[R600_HW_STAGE_ES] = 0; in r600_init_atom_start_cs()
2254 rctx->r6xx_num_clause_temp_gprs = num_temp_gprs; in r600_init_atom_start_cs()
2302 if (rctx->b.chip_class >= R700) { in r600_init_atom_start_cs()
2383 if (rctx->b.chip_class >= R700) { in r600_init_atom_start_cs()
2416 if (rctx->b.chip_class == R700) in r600_init_atom_start_cs()
2418 if (rctx->b.chip_class == R700 && rctx->screen->b.has_streamout) in r600_init_atom_start_cs()
2422 if (rctx->screen->b.has_streamout) { in r600_init_atom_start_cs()
2433 struct r600_context *rctx = (struct r600_context *)ctx; in r600_update_ps_state() local
2441 unsigned sprite_coord_enable = rctx->rasterizer ? rctx->rasterizer->sprite_coord_enable : 0; in r600_update_ps_state()
2469 rctx->rasterizer && rctx->rasterizer->flatshade)) in r600_update_ps_state()
2498 rctx->framebuffer.nr_samples > 1 && rctx->ps_iter_samples > 0) in r600_update_ps_state()
2548 if (rctx->b.family == CHIP_R600) in r600_update_ps_state()
2578 if (rctx->rasterizer) in r600_update_ps_state()
2579 shader->flatshade = rctx->rasterizer->flatshade; in r600_update_ps_state()
2646 struct r600_context *rctx = (struct r600_context *)ctx; in r600_update_gs_state() local
2655 switch (rctx->b.family) { in r600_update_gs_state()
2675 if (rctx->b.chip_class >= R700) { in r600_update_gs_state()
2722 void *r600_create_resolve_blend(struct r600_context *rctx) in r600_create_resolve_blend() argument
2739 return r600_create_blend_state_mode(&rctx->b.b, &blend, V_028808_SPECIAL_RESOLVE_BOX); in r600_create_resolve_blend()
2742 void *r700_create_resolve_blend(struct r600_context *rctx) in r700_create_resolve_blend() argument
2749 return r600_create_blend_state_mode(&rctx->b.b, &blend, V_028808_SPECIAL_RESOLVE_BOX); in r700_create_resolve_blend()
2752 void *r600_create_decompress_blend(struct r600_context *rctx) in r600_create_decompress_blend() argument
2759 return r600_create_blend_state_mode(&rctx->b.b, &blend, V_028808_SPECIAL_EXPAND_SAMPLES); in r600_create_decompress_blend()
2762 void *r600_create_db_flush_dsa(struct r600_context *rctx) in r600_create_db_flush_dsa() argument
2767 if (rctx->b.family == CHIP_RV610 || rctx->b.family == CHIP_RV630 || in r600_create_db_flush_dsa()
2768 rctx->b.family == CHIP_RV620 || rctx->b.family == CHIP_RV635) in r600_create_db_flush_dsa()
2783 return rctx->b.b.create_depth_stencil_alpha_state(&rctx->b.b, &dsa); in r600_create_db_flush_dsa()
2786 void r600_update_db_shader_control(struct r600_context * rctx) in r600_update_db_shader_control() argument
2792 if (!rctx->ps_shader) { in r600_update_db_shader_control()
2796 dual_export = rctx->framebuffer.export_16bpc && in r600_update_db_shader_control()
2797 !rctx->ps_shader->current->ps_depth_export; in r600_update_db_shader_control()
2799 db_shader_control = rctx->ps_shader->current->db_shader_control | in r600_update_db_shader_control()
2802 ps_conservative_z = rctx->ps_shader->current->shader.ps_conservative_z; in r600_update_db_shader_control()
2811 if (rctx->alphatest_state.sx_alpha_test_control) { in r600_update_db_shader_control()
2817 if (db_shader_control != rctx->db_misc_state.db_shader_control || in r600_update_db_shader_control()
2818 ps_conservative_z != rctx->db_misc_state.ps_conservative_z) { in r600_update_db_shader_control()
2819 rctx->db_misc_state.db_shader_control = db_shader_control; in r600_update_db_shader_control()
2820 rctx->db_misc_state.ps_conservative_z = ps_conservative_z; in r600_update_db_shader_control()
2821 r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); in r600_update_db_shader_control()
2837 static boolean r600_dma_copy_tile(struct r600_context *rctx, in r600_dma_copy_tile() argument
2852 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in r600_dma_copy_tile()
2916 r600_need_dma_space(&rctx->b, ncopy * 7, &rdst->resource, &rsrc->resource); in r600_dma_copy_tile()
2922 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rsrc->resource, RADEON_USAGE_READ, in r600_dma_copy_tile()
2924 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource, RADEON_USAGE_WRITE, in r600_dma_copy_tile()
2950 struct r600_context *rctx = (struct r600_context *)ctx; in r600_dma_copy() local
2958 if (rctx->b.dma.cs == NULL) { in r600_dma_copy()
2966 r600_dma_copy_buffer(rctx, dst, src, dst_x, src_box->x, src_box->width); in r600_dma_copy()
2971 !r600_prepare_for_dma_blit(&rctx->b, rdst, dst_level, dstx, dsty, in r600_dma_copy()
3018 r600_dma_copy_buffer(rctx, dst, src, dst_offset, src_offset, size); in r600_dma_copy()
3020 if (!r600_dma_copy_tile(rctx, dst, dst_level, dst_x, dst_y, dst_z, in r600_dma_copy()
3033 void r600_init_state_functions(struct r600_context *rctx) in r600_init_state_functions() argument
3047 r600_init_atom(rctx, &rctx->framebuffer.atom, id++, r600_emit_framebuffer_state, 0); in r600_init_state_functions()
3050 …r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_VERTEX].atom, id++, r600_emit_vs_constant_b… in r600_init_state_functions()
3051 …r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, r600_emit_gs_constant… in r600_init_state_functions()
3052 …r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, r600_emit_ps_constant… in r600_init_state_functions()
3057 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].states.atom, id++, r600_emit_vs_sampler_s… in r600_init_state_functions()
3058 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, r600_emit_gs_sampler… in r600_init_state_functions()
3059 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].states.atom, id++, r600_emit_ps_sampler… in r600_init_state_functions()
3061 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_VERTEX].views.atom, id++, r600_emit_vs_sampler_vi… in r600_init_state_functions()
3062 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, r600_emit_gs_sampler_… in r600_init_state_functions()
3063 …r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views.atom, id++, r600_emit_ps_sampler_… in r600_init_state_functions()
3064 r600_init_atom(rctx, &rctx->vertex_buffer_state.atom, id++, r600_emit_vertex_buffers, 0); in r600_init_state_functions()
3066 r600_init_atom(rctx, &rctx->vgt_state.atom, id++, r600_emit_vgt_state, 10); in r600_init_state_functions()
3068 r600_init_atom(rctx, &rctx->seamless_cube_map.atom, id++, r600_emit_seamless_cube_map, 3); in r600_init_state_functions()
3069 r600_init_atom(rctx, &rctx->sample_mask.atom, id++, r600_emit_sample_mask, 3); in r600_init_state_functions()
3070 rctx->sample_mask.sample_mask = ~0; in r600_init_state_functions()
3072 r600_init_atom(rctx, &rctx->alphatest_state.atom, id++, r600_emit_alphatest_state, 6); in r600_init_state_functions()
3073 r600_init_atom(rctx, &rctx->blend_color.atom, id++, r600_emit_blend_color, 6); in r600_init_state_functions()
3074 r600_init_atom(rctx, &rctx->blend_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
3075 r600_init_atom(rctx, &rctx->cb_misc_state.atom, id++, r600_emit_cb_misc_state, 7); in r600_init_state_functions()
3076 r600_init_atom(rctx, &rctx->clip_misc_state.atom, id++, r600_emit_clip_misc_state, 6); in r600_init_state_functions()
3077 r600_init_atom(rctx, &rctx->clip_state.atom, id++, r600_emit_clip_state, 26); in r600_init_state_functions()
3078 r600_init_atom(rctx, &rctx->db_misc_state.atom, id++, r600_emit_db_misc_state, 7); in r600_init_state_functions()
3079 r600_init_atom(rctx, &rctx->db_state.atom, id++, r600_emit_db_state, 11); in r600_init_state_functions()
3080 r600_init_atom(rctx, &rctx->dsa_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
3081 r600_init_atom(rctx, &rctx->poly_offset_state.atom, id++, r600_emit_polygon_offset, 9); in r600_init_state_functions()
3082 r600_init_atom(rctx, &rctx->rasterizer_state.atom, id++, r600_emit_cso_state, 0); in r600_init_state_functions()
3083 r600_add_atom(rctx, &rctx->b.scissors.atom, id++); in r600_init_state_functions()
3084 r600_add_atom(rctx, &rctx->b.viewports.atom, id++); in r600_init_state_functions()
3085 r600_init_atom(rctx, &rctx->config_state.atom, id++, r600_emit_config_state, 3); in r600_init_state_functions()
3086 r600_init_atom(rctx, &rctx->stencil_ref.atom, id++, r600_emit_stencil_ref, 4); in r600_init_state_functions()
3087 r600_init_atom(rctx, &rctx->vertex_fetch_shader.atom, id++, r600_emit_vertex_fetch_shader, 5); in r600_init_state_functions()
3088 r600_add_atom(rctx, &rctx->b.render_cond_atom, id++); in r600_init_state_functions()
3089 r600_add_atom(rctx, &rctx->b.streamout.begin_atom, id++); in r600_init_state_functions()
3090 r600_add_atom(rctx, &rctx->b.streamout.enable_atom, id++); in r600_init_state_functions()
3092 r600_init_atom(rctx, &rctx->hw_shader_stages[i].atom, id++, r600_emit_shader, 0); in r600_init_state_functions()
3093 r600_init_atom(rctx, &rctx->shader_stages.atom, id++, r600_emit_shader_stages, 0); in r600_init_state_functions()
3094 r600_init_atom(rctx, &rctx->gs_rings.atom, id++, r600_emit_gs_rings, 0); in r600_init_state_functions()
3096 rctx->b.b.create_blend_state = r600_create_blend_state; in r600_init_state_functions()
3097 rctx->b.b.create_depth_stencil_alpha_state = r600_create_dsa_state; in r600_init_state_functions()
3098 rctx->b.b.create_rasterizer_state = r600_create_rs_state; in r600_init_state_functions()
3099 rctx->b.b.create_sampler_state = r600_create_sampler_state; in r600_init_state_functions()
3100 rctx->b.b.create_sampler_view = r600_create_sampler_view; in r600_init_state_functions()
3101 rctx->b.b.set_framebuffer_state = r600_set_framebuffer_state; in r600_init_state_functions()
3102 rctx->b.b.set_polygon_stipple = r600_set_polygon_stipple; in r600_init_state_functions()
3103 rctx->b.b.set_min_samples = r600_set_min_samples; in r600_init_state_functions()
3104 rctx->b.b.get_sample_position = r600_get_sample_position; in r600_init_state_functions()
3105 rctx->b.dma_copy = r600_dma_copy; in r600_init_state_functions()