2854 	struct r600_texture *rdst = (struct r600_texture*)dst;  in r600_dma_copy_tile()  local
2859 	dst_mode = rdst->surface.u.legacy.level[dst_level].mode;  in r600_dma_copy_tile()
2883 		addr = rdst->surface.u.legacy.level[dst_level].offset;  in r600_dma_copy_tile()
2884 		addr += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;  in r600_dma_copy_tile()
2889 …slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[ds…  in r600_dma_copy_tile()
2896 		height = u_minify(rdst->resource.b.b.height0, dst_level);  in r600_dma_copy_tile()
2901 		base = rdst->surface.u.legacy.level[dst_level].offset;  in r600_dma_copy_tile()
2916 	r600_need_dma_space(&rctx->b, ncopy * 7, &rdst->resource, &rsrc->resource);  in r600_dma_copy_tile()
2924 		radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource, RADEON_USAGE_WRITE,  in r600_dma_copy_tile()
2952 	struct r600_texture *rdst = (struct r600_texture*)dst;  in r600_dma_copy()  local
2971 	    !r600_prepare_for_dma_blit(&rctx->b, rdst, dst_level, dstx, dsty,  in r600_dma_copy()
2980 	bpp = rdst->surface.bpe;  in r600_dma_copy()
2981 	dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe;  in r600_dma_copy()
2984 	dst_w = u_minify(rdst->resource.b.b.width0, dst_level);  in r600_dma_copy()
2987 	dst_mode = rdst->surface.u.legacy.level[dst_level].mode;  in r600_dma_copy()
3010 		dst_offset = rdst->surface.u.legacy.level[dst_level].offset;  in r600_dma_copy()
3011 		dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;  in r600_dma_copy()