38 	struct r600_resource *rdst = (struct r600_resource*)dst;  in si_dma_copy_buffer()  local
44 	util_range_add(&rdst->valid_buffer_range, dst_offset,  in si_dma_copy_buffer()
47 	dst_offset += rdst->gpu_address;  in si_dma_copy_buffer()
62 	si_need_dma_space(&ctx->b, ncopy * 5, rdst, rsrc);  in si_dma_copy_buffer()
87 	struct r600_resource *rdst = r600_resource(dst);  in si_dma_clear_buffer()  local
98 	util_range_add(&rdst->valid_buffer_range, offset, offset + size);  in si_dma_clear_buffer()
100 	offset += rdst->gpu_address;  in si_dma_clear_buffer()
104 	si_need_dma_space(&sctx->b, ncopy * 4, rdst, NULL);  in si_dma_clear_buffer()
135 	struct r600_texture *rdst = (struct r600_texture*)dst;  in si_dma_copy_tile()  local
136 	unsigned dst_mode = rdst->surface.u.legacy.level[dst_level].mode;  in si_dma_copy_tile()
138 	struct r600_texture *rlinear = detile ? rdst : rsrc;  in si_dma_copy_tile()
139 	struct r600_texture *rtiled = detile ? rsrc : rdst;  in si_dma_copy_tile()
193 	si_need_dma_space(&ctx->b, ncopy * 9, &rdst->resource, &rsrc->resource);  in si_dma_copy_tile()
228 	struct r600_texture *rdst = (struct r600_texture*)dst;  in si_dma_copy()  local
261 	    !si_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty,  in si_dma_copy()
270 	bpp = rdst->surface.bpe;  in si_dma_copy()
271 	dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe;  in si_dma_copy()
274 	dst_w = u_minify(rdst->resource.b.b.width0, dst_level);  in si_dma_copy()
276 	dst_mode = rdst->surface.u.legacy.level[dst_level].mode;  in si_dma_copy()
282 	    src_box->height != u_minify(rdst->resource.b.b.height0, dst_level) ||  in si_dma_copy()
284 	    rdst->surface.u.legacy.level[dst_level].nblk_y) {  in si_dma_copy()
306 		dst_offset = rdst->surface.u.legacy.level[dst_level].offset;  in si_dma_copy()
307 		dst_offset += (uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4 * dst_z;  in si_dma_copy()