Lines Matching refs:dispatch_width
598 if (dispatch_width == 8) in SHADER_TIME_ADD()
650 if (dispatch_width > n) { in limit_dispatch_width()
966 return 1 * dispatch_width / 8; in implied_mrf_writes()
970 return 2 * dispatch_width / 8; in implied_mrf_writes()
1001 int reg_width = dispatch_width / 8; in vgrf()
1193 if (dispatch_width == 8) { in emit_samplepos_setup()
1203 if (dispatch_width == 8) { in emit_samplepos_setup()
3119 if (dispatch_width >= 16) in remove_duplicate_mrf_writes()
3571 fs_reg imm(VGRF, alloc.allocate(dispatch_width / 8), in lower_integer_multiplication()
3902 assert(bld.dispatch_width() != 16); in lower_fb_write_logical_send()
3935 if (devinfo->gen < 6 && bld.dispatch_width() == 16) in lower_fb_write_logical_send()
3993 (op == SHADER_OPCODE_TEX && bld.dispatch_width() == 8))) { in lower_sampler_logical_send_gen4()
4002 assert(bld.dispatch_width() == 8); in lower_sampler_logical_send_gen4()
4037 assert(shadow_c.file != BAD_FILE ? bld.dispatch_width() == 8 : in lower_sampler_logical_send_gen4()
4038 bld.dispatch_width() == 16); in lower_sampler_logical_send_gen4()
4048 if (op == SHADER_OPCODE_TEX && bld.dispatch_width() == 8) { in lower_sampler_logical_send_gen4()
4190 unsigned reg_width = bld.dispatch_width() / 8; in lower_sampler_logical_send_gen7()
4277 assert(bld.dispatch_width() == 8); in lower_sampler_logical_send_gen7()
5217 return !(is_periodic(inst->src[i], lbld.dispatch_width()) || in needs_src_copy()
5219 lbld.dispatch_width() <= inst->exec_size)) || in needs_src_copy()
5240 const fs_builder cbld = lbld.group(MIN2(lbld.dispatch_width(), in emit_unzip()
5249 } else if (is_periodic(inst->src[i], lbld.dispatch_width())) { in emit_unzip()
5283 if (lbld.dispatch_width() > inst->exec_size) in needs_dst_copy()
5320 assert(lbld_before.dispatch_width() == lbld_after.dispatch_width()); in emit_zip()
5337 lbld_before.group(MIN2(lbld_before.dispatch_width(), in emit_zip()
5346 lbld_after.group(MIN2(lbld_after.dispatch_width(), in emit_zip()
5685 if (inst->exec_size != dispatch_width) in dump_instruction()
5741 if (dispatch_width == 16) { in setup_fs_payload_gen6()
5753 if (dispatch_width == 16) { in setup_fs_payload_gen6()
5765 if (dispatch_width == 16) { in setup_fs_payload_gen6()
5795 if (dispatch_width == 16) { in setup_fs_payload_gen6()
5956 stage_abbrev, dispatch_width, nir->info.name, iteration, pass_num); \ in optimize()
5970 stage_abbrev, dispatch_width, nir->info.name); in optimize()
6082 inst->dst = fs_reg(VGRF, alloc.allocate(dispatch_width / 8), in fixup_3src_null_dest()
6130 if (dispatch_width > min_dispatch_width) { in allocate_registers()
6439 assert(dispatch_width == 16); in run_fs()
6506 assert(dispatch_width >= min_dispatch_width); in run_cs()
7009 unsigned dispatch_width) in compile_cs_to_nir() argument
7013 brw_nir_lower_cs_intrinsics(shader, dispatch_width); in compile_cs_to_nir()