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Lines Matching refs:VirtReg

150     int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
155 void killVirtReg(unsigned VirtReg);
157 void spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg);
165 unsigned VirtReg, unsigned Hint);
167 unsigned VirtReg, unsigned Hint);
176 int RAFast::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { in getStackSpaceFor() argument
178 int SS = StackSlotForVirtReg[VirtReg]; in getStackSpaceFor()
187 StackSlotForVirtReg[VirtReg] = FrameIdx; in getStackSpaceFor()
235 void RAFast::killVirtReg(unsigned VirtReg) { in killVirtReg() argument
236 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in killVirtReg()
238 LiveRegMap::iterator LRI = LiveVirtRegs.find(VirtReg); in killVirtReg()
245 void RAFast::spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg) { in spillVirtReg() argument
246 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in spillVirtReg()
248 LiveRegMap::iterator LRI = LiveVirtRegs.find(VirtReg); in spillVirtReg()
386 switch (unsigned VirtReg = PhysRegState[PhysReg]) { in definePhysReg() local
390 spillVirtReg(MI, VirtReg); in definePhysReg()
402 switch (unsigned VirtReg = PhysRegState[Alias]) { in definePhysReg() local
406 spillVirtReg(MI, VirtReg); in definePhysReg()
429 switch (unsigned VirtReg = PhysRegState[PhysReg]) { in calcSpillCost() local
435 DEBUG(dbgs() << PrintReg(VirtReg, TRI) << " corresponding " in calcSpillCost()
439 return LiveVirtRegs.lookup(VirtReg).Dirty ? spillDirty : spillClean; in calcSpillCost()
449 switch (unsigned VirtReg = PhysRegState[Alias]) { in calcSpillCost() local
458 Cost += LiveVirtRegs.lookup(VirtReg).Dirty ? spillDirty : spillClean; in calcSpillCost()
480 const unsigned VirtReg = LRE.first; in allocVirtReg() local
482 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in allocVirtReg()
485 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg); in allocVirtReg()
512 DEBUG(dbgs() << "Allocating " << PrintReg(VirtReg) << " from " in allocVirtReg()
542 unsigned VirtReg, unsigned Hint) { in defineVirtReg() argument
543 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in defineVirtReg()
547 tie(LRI, New) = LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg())); in defineVirtReg()
552 MRI->hasOneNonDBGUse(VirtReg)) { in defineVirtReg()
553 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg); in defineVirtReg()
576 unsigned VirtReg, unsigned Hint) { in reloadVirtReg() argument
577 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && in reloadVirtReg()
581 tie(LRI, New) = LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg())); in reloadVirtReg()
586 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg); in reloadVirtReg()
587 int FrameIndex = getStackSpaceFor(VirtReg, RC); in reloadVirtReg()
588 DEBUG(dbgs() << "Reloading " << PrintReg(VirtReg, TRI) << " into " in reloadVirtReg()