Lines Matching refs:virtReg
118 unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) { in getRegAllocPref() argument
119 std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(virtReg); in getRegAllocPref()
129 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot() argument
130 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
131 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()
133 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); in assignVirt2StackSlot()
134 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); in assignVirt2StackSlot()
137 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot() argument
138 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()
139 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()
144 Virt2StackSlotMap[virtReg] = SS; in assignVirt2StackSlot()
147 int VirtRegMap::assignVirtReMatId(unsigned virtReg) { in assignVirtReMatId() argument
148 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirtReMatId()
149 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && in assignVirtReMatId()
151 Virt2ReMatIdMap[virtReg] = ReMatId; in assignVirtReMatId()
155 void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { in assignVirtReMatId() argument
156 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirtReMatId()
157 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT && in assignVirtReMatId()
159 Virt2ReMatIdMap[virtReg] = id; in assignVirtReMatId()