Lines Matching refs:rci
467 for (unsigned rci = RegClasses.size(); rci; --rci) { in computeSubClasses() local
468 CodeGenRegisterClass &RC = *RegClasses[rci - 1]; in computeSubClasses()
473 for (unsigned s = rci; s != RegClasses.size(); ++s) { in computeSubClasses()
485 for (unsigned s = rci - 1; s && testSubClass(&RC, RegClasses[s - 1]); --s) in computeSubClasses()
490 for (unsigned rci = 0; rci != RegClasses.size(); ++rci) { in computeSubClasses() local
491 const BitVector &SC = RegClasses[rci]->getSubClasses(); in computeSubClasses()
493 if (unsigned(s) == rci) in computeSubClasses()
495 RegClasses[s]->SuperClasses.push_back(RegClasses[rci]); in computeSubClasses()
502 for (unsigned rci = 0; rci != RegClasses.size(); ++rci) in computeSubClasses() local
503 if (!RegClasses[rci]->getDef()) in computeSubClasses()
504 RegClasses[rci]->inheritProperties(RegBank); in computeSubClasses()
755 for (unsigned rci = 0; rci != RegClasses.size(); ++rci) { in computeInferredRegisterClasses() local
756 CodeGenRegisterClass &RC = *RegClasses[rci]; in computeInferredRegisterClasses()