Lines Matching refs:Dm
1201 IValueT Dm, bool UseQRegs, bool IsFloatTy) { in emitSIMDBase() argument
1207 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitSIMDBase()
1212 IValueT Dn, IValueT Dm, bool UseQRegs) { in emitSIMD() argument
1216 emitSIMDBase(Opcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in emitSIMD()
1269 IValueT Dd, IValueT Dn, IValueT Dm) { in emitVFPddd() argument
1272 assert(Dm < RegARM32::getNumDRegs()); in emitVFPddd()
1279 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitVFPddd()
1288 IValueT Dm = encodeDRegister(OpDm, "Dm", InstName); in emitVFPddd() local
1289 emitVFPddd(Cond, Opcode, Dd, Dn, Dm); in emitVFPddd()
2345 const IValueT Dm = encodeDRegister(OpDm, "Dm", Vabsd); in vabsd() local
2348 emitVFPddd(Cond, VabsdOpcode, Dd, D0, Dm); in vabsd()
2361 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vabsq)); in vabsq() local
2366 emitSIMDBase(VabsqOpcode, Dd, Dn, Dm, UseQRegs, isFloatingType(ElmtTy)); in vabsq()
2544 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcmpd); in vcmpd() local
2547 emitVFPddd(Cond, VcmpdOpcode, Dd, Dn, Dm); in vcmpd()
2555 constexpr IValueT Dm = 0; in vcmpdz() local
2556 emitVFPddd(Cond, VcmpdzOpcode, Dd, Dn, Dm); in vcmpdz()
2579 IValueT Dm) { in emitVFPsd() argument
2581 assert(Dm < RegARM32::getNumDRegs()); in emitVFPsd()
2587 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in emitVFPsd()
2623 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtsd); in vcvtsd() local
2626 emitVFPsd(Cond, VcvtsdOpcode, Sd, Dm); in vcvtsd()
2653 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtid); in vcvtid() local
2656 emitVFPsd(Cond, VcvtidOpcode, Sd, Dm); in vcvtid()
2698 IValueT Dm = encodeDRegister(OpDm, "Dm", Vcvtud); in vcvtud() local
2700 emitVFPsd(Cond, VcvtudOpcode, Sd, Dm); in vcvtud()
2817 IValueT Dm = encodeDRegister(OpDm, "Dm", Veord); in veord() local
2823 (getYInRegYXXXX(Dm) << 5) | getXXXXInRegYXXXX(Dm); in veord()
3079 IValueT Dm = encodeSRegister(OpDm, "Dm", Vmovdd); in vmovdd() local
3082 emitVFPddd(Cond, VmovddOpcode, Dd, D0, Dm); in vmovdd()
3094 IValueT Dm = encodeDRegister(OpDm, "Dm", Vmovdrr); in vmovdrr() local
3105 (Rt << 12) | (getYInRegYXXXX(Dm) << 5) | in vmovdrr()
3106 getXXXXInRegYXXXX(Dm); in vmovdrr()
3148 IValueT Dm = encodeDRegister(OpDm, "Dm", Vmovrrd); in vmovrrd() local
3157 (Rt << 12) | (getYInRegYXXXX(Dm) << 5) | in vmovrrd()
3158 getXXXXInRegYXXXX(Dm); in vmovrrd()
3363 const IValueT Dm = mapQRegToDReg(Qm); in vmulh() local
3367 emitSIMDBase(VmullOpcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in vmulh()
3403 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmull)); in vmlap() local
3407 emitSIMDBase(VmullOpcode | (ElmtSize << ElmtShift), Dd, Dn, Dm, UseQRegs, in vmlap()
3480 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vzip)); in vzip() local
3490 emitSIMDBase(VmovOpcode, Dd + 1, Dm, Dm, UseQRegs, IsFloatTy); in vzip()
3555 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovlq() local
3562 if (Dd != Dm) in vmovlq()
3563 emitSIMDBase(VmovOpcode, Dd, Dm, Dm, UseQRegs, IsFloat); in vmovlq()
3581 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovhq() local
3590 if (Dd + 1 != Dm + 1) in vmovhq()
3591 emitSIMDBase(VmovOpcode, Dd + 1, Dm + 1, Dm + 1, UseQRegs, IsFloat); in vmovhq()
3607 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovhlq() local
3614 if (Dd != Dm + 1) in vmovhlq()
3615 emitSIMDBase(VmovOpcode, Dd, Dm + 1, Dm + 1, UseQRegs, IsFloat); in vmovhlq()
3633 const IValueT Dm = mapQRegToDReg(encodeQRegister(OpQm, "Qm", Vmov)); in vmovlhq() local
3640 if (Dd + 1 != Dm) in vmovlhq()
3641 emitSIMDBase(VmovOpcode, Dd + 1, Dm, Dm, UseQRegs, IsFloat); in vmovlhq()
3919 const IValueT Dm = mapQRegToDReg(Qm); in vqmovn2() local
3932 emitSIMDBase(VqmovnOpcode, Dd + 0, 0, Dm, UseQRegs, IsFloatTy); in vqmovn2()
3935 emitSIMDBase(VqmovnOpcode, Dd + 0, 0, Dm, UseQRegs, IsFloatTy); in vqmovn2()
3940 emitSIMDBase(VqmovnOpcode, Dd, 0, Dm, UseQRegs, IsFloatTy); in vqmovn2()
4077 IValueT Dm = encodeDRegister(OpDm, "Dm", Vsqrtd); in vsqrtd() local
4080 emitVFPddd(Cond, VsqrtdOpcode, Dd, D0, Dm); in vsqrtd()