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Lines Matching refs:Inst0

678 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1,   \  in TEST_F()  argument
684 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 ", " #Src0 \ in TEST_F()
694 __ Inst0(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst0, \ in TEST_F()
712 #define TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size) \ in TEST_F() argument
717 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
727 __ Inst0(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst0, \ in TEST_F()
747 #define TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Imm, Op, Size) \ in TEST_F() argument
752 "(" #Inst0 ", " #Inst1 ", " #Dst0 ", " #Dst1 ", " #Value0 \ in TEST_F()
758 __ Inst0(IceType_i##Size, GPRRegister::Encoded_Reg_##Dst0, \ in TEST_F()
776 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
781 "(" #Inst0 ", " #Inst1 ", Addr, " #Value0 ", " #Src0 ", " #Src1 \ in TEST_F()
791 __ Inst0(IceType_i##Size, dwordAddress(T0), \ in TEST_F()
811 #define TestImplAddrImm(Inst0, Inst1, Value0, Imm, Op, Size) \ in TEST_F() argument
816 "(" #Inst0 ", " #Inst1 ", Addr, " #Value0 ", Imm(" #Imm "), " #Op \ in TEST_F()
822 __ Inst0(IceType_i##Size, dwordAddress(T0), \ in TEST_F()
842 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
845 TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F()
847 TestImplRegAddr(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \ in TEST_F()
848 TestImplRegImm(Inst0, Inst1, Dst0, Dst1, Value0, Value1, Op, Size); \ in TEST_F()
849 TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size); \ in TEST_F()
850 TestImplAddrImm(Inst0, Inst1, Value0, Value1, Op, Size); \ in TEST_F()