Lines Matching refs:EVV
27344 PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
27358 PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
27372 PATTERN: EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
27388 PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
27402 PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
27416 PATTERN: EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
27432 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27448 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
27464 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27480 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
27496 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27512 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
27528 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27544 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
27560 PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
27574 PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
27588 PATTERN: EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
27604 PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
27618 PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
27632 PATTERN: EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
27648 PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
27662 PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1
27676 PATTERN: EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
27692 PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
27706 PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0
27720 PATTERN: EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
27736 PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
27750 PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
27764 PATTERN: EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
27780 PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
27794 PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
27808 PATTERN: EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
27824 PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
27838 PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1
27852 PATTERN: EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
27868 PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
27882 PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0
27896 PATTERN: EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
27912 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27928 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
27944 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27960 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
27976 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
27992 PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
28008 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODR…
28024 PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODR…
28087 PATTERN: EVV 0x9A VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_3…
28103 PATTERN: EVV 0x9B VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
28119 PATTERN: EVV 0xAA VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_3…
28135 PATTERN: EVV 0xAB VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
28182 PATTERN: EVV 0x52 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_3…
28198 PATTERN: EVV 0x53 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_3…
28245 PATTERN: EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
28259 PATTERN: EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
28275 PATTERN: EVV 0x55 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
28289 PATTERN: EVV 0x55 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
28336 PATTERN: EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
28350 PATTERN: EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
28364 PATTERN: EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
28380 PATTERN: EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
28394 PATTERN: EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
28408 PATTERN: EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
28424 PATTERN: EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
28438 PATTERN: EVV 0x58 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
28452 PATTERN: EVV 0x58 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
28468 PATTERN: EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
28482 PATTERN: EVV 0x58 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
28496 PATTERN: EVV 0x58 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
28512 PATTERN: EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
28526 PATTERN: EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
28542 PATTERN: EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
28556 PATTERN: EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
28572 PATTERN: EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
28586 PATTERN: EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
28602 PATTERN: EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
28616 PATTERN: EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
28632 PATTERN: EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
28648 PATTERN: EVV 0x1B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
28664 PATTERN: EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
28680 PATTERN: EVV 0x5B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
28696 PATTERN: EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
28712 PATTERN: EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
28728 PATTERN: EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
28744 PATTERN: EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
28760 PATTERN: EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM8()
28774 PATTERN: EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 …
28788 PATTERN: EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIMM8…
28804 PATTERN: EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM8()
28818 PATTERN: EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 …
28832 PATTERN: EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIMM8…
28848 PATTERN: EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 ZEROING=0 UIMM8()
28862 PATTERN: EVV 0xC2 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
28876 PATTERN: EVV 0xC2 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 UIMM8(…
28892 PATTERN: EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 UIMM8()
28906 PATTERN: EVV 0xC2 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
28920 PATTERN: EVV 0xC2 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 UIMM8(…
28937 PATTERN: EVV 0x2F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 MASK=0
28952 PATTERN: EVV 0x2F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
28967 PATTERN: EVV 0x2F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
28984 PATTERN: EVV 0x2F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
28999 PATTERN: EVV 0x2F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
29014 PATTERN: EVV 0x2F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
29030 PATTERN: EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR Z…
29046 PATTERN: EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
29062 PATTERN: EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
29078 PATTERN: EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29094 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29108 PATTERN: EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
29124 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29138 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
29152 PATTERN: EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
29168 PATTERN: EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
29182 PATTERN: EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
29196 PATTERN: EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
29212 PATTERN: EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
29226 PATTERN: EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
29240 PATTERN: EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
29256 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
29270 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
29284 PATTERN: EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
29300 PATTERN: EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29314 PATTERN: EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
29328 PATTERN: EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
29344 PATTERN: EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29358 PATTERN: EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
29372 PATTERN: EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
29388 PATTERN: EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29402 PATTERN: EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 …
29416 PATTERN: EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
29432 PATTERN: EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
29446 PATTERN: EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
29462 PATTERN: EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
29478 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
29492 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
29506 PATTERN: EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
29522 PATTERN: EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
29536 PATTERN: EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29550 PATTERN: EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
29566 PATTERN: EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
29580 PATTERN: EVV 0x2D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29594 PATTERN: EVV 0x2D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
29610 PATTERN: EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
29624 PATTERN: EVV 0x5A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29638 PATTERN: EVV 0x5A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
29654 PATTERN: EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
29668 PATTERN: EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29682 PATTERN: EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
29698 PATTERN: EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
29712 PATTERN: EVV 0x79 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29726 PATTERN: EVV 0x79 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
29742 PATTERN: EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 MASK=0
29756 PATTERN: EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 MASK=0…
29772 PATTERN: EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 ZEROING=0 MASK=0
29786 PATTERN: EVV 0x2A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29800 PATTERN: EVV 0x2A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 ZEROING=…
29816 PATTERN: EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 MASK=0
29830 PATTERN: EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29844 PATTERN: EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 MASK=0…
29860 PATTERN: EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 ZEROING=0 MASK=0
29874 PATTERN: EVV 0x2A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29888 PATTERN: EVV 0x2A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 ZEROING=…
29904 PATTERN: EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
29918 PATTERN: EVV 0x5A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0
29932 PATTERN: EVV 0x5A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
29948 PATTERN: EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
29962 PATTERN: EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
29976 PATTERN: EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
29992 PATTERN: EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
30006 PATTERN: EVV 0x2D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
30020 PATTERN: EVV 0x2D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
30036 PATTERN: EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
30050 PATTERN: EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
30064 PATTERN: EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
30080 PATTERN: EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
30094 PATTERN: EVV 0x79 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
30108 PATTERN: EVV 0x79 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
30124 PATTERN: EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
30138 PATTERN: EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 …
30152 PATTERN: EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
30168 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
30182 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 …
30196 PATTERN: EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
30212 PATTERN: EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
30226 PATTERN: EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 …
30240 PATTERN: EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
30256 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
30270 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 …
30284 PATTERN: EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
30300 PATTERN: EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
30314 PATTERN: EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
30328 PATTERN: EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
30344 PATTERN: EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
30358 PATTERN: EVV 0x2C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
30372 PATTERN: EVV 0x2C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
30388 PATTERN: EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
30402 PATTERN: EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
30416 PATTERN: EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
30432 PATTERN: EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
30446 PATTERN: EVV 0x78 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
30460 PATTERN: EVV 0x78 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
30476 PATTERN: EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
30490 PATTERN: EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
30504 PATTERN: EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
30520 PATTERN: EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
30534 PATTERN: EVV 0x2C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
30548 PATTERN: EVV 0x2C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
30564 PATTERN: EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
30578 PATTERN: EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
30592 PATTERN: EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
30608 PATTERN: EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 NOEVSR ZEROING=0…
30622 PATTERN: EVV 0x78 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
30636 PATTERN: EVV 0x78 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 NOEVSR ZE…
30652 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
30666 PATTERN: EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
30682 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
30696 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
30710 PATTERN: EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
30726 PATTERN: EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 MASK=0
30740 PATTERN: EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 MASK=0…
30756 PATTERN: EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 ZEROING=0 MASK=0
30770 PATTERN: EVV 0x7B VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
30784 PATTERN: EVV 0x7B VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 ZEROING=…
30800 PATTERN: EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 ZEROING=0 MASK=0
30814 PATTERN: EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
30828 PATTERN: EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ZEROING=0 MASK=0…
30844 PATTERN: EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 mode64 ZEROING=0 MASK=0
30858 PATTERN: EVV 0x7B VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
30872 PATTERN: EVV 0x7B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 mode64 ZEROING=…
30888 PATTERN: EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
30902 PATTERN: EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
30916 PATTERN: EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
30932 PATTERN: EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
30946 PATTERN: EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
30960 PATTERN: EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
30976 PATTERN: EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
30990 PATTERN: EVV 0x5E VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
31004 PATTERN: EVV 0x5E VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
31020 PATTERN: EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
31034 PATTERN: EVV 0x5E VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
31048 PATTERN: EVV 0x5E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
31064 PATTERN: EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
31080 PATTERN: EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
31096 PATTERN: EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
31112 PATTERN: EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
31128 PATTERN: EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
31144 PATTERN: EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
31160 PATTERN: EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
31176 PATTERN: EVV 0x1B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR Z…
31192 PATTERN: EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
31208 PATTERN: EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
31224 PATTERN: EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
31240 PATTERN: EVV 0x3B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR Z…
31255 PATTERN: EVV 0x17 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 …
31269 PATTERN: EVV 0x17 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZER…
31285 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
31299 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
31313 PATTERN: EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
31329 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
31343 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
31357 PATTERN: EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
31373 PATTERN: EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()
31387 PATTERN: EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1…
31401 PATTERN: EVV 0x55 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_…
31417 PATTERN: EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()
31431 PATTERN: EVV 0x55 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0…
31445 PATTERN: EVV 0x55 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_…
31461 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
31475 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
31489 PATTERN: EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
31505 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
31519 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
31533 PATTERN: EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
31549 PATTERN: EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
31563 PATTERN: EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
31577 PATTERN: EVV 0x99 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
31593 PATTERN: EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
31607 PATTERN: EVV 0x99 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
31621 PATTERN: EVV 0x99 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
31637 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
31651 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
31665 PATTERN: EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
31681 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
31695 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
31709 PATTERN: EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
31725 PATTERN: EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
31739 PATTERN: EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
31753 PATTERN: EVV 0xA9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
31769 PATTERN: EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
31783 PATTERN: EVV 0xA9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
31797 PATTERN: EVV 0xA9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
31813 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
31827 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
31841 PATTERN: EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
31857 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
31871 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
31885 PATTERN: EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
31901 PATTERN: EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
31915 PATTERN: EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
31929 PATTERN: EVV 0xB9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
31945 PATTERN: EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
31959 PATTERN: EVV 0xB9 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
31973 PATTERN: EVV 0xB9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
31989 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32003 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32017 PATTERN: EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32033 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32047 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32061 PATTERN: EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32077 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32091 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32105 PATTERN: EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32121 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32135 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32149 PATTERN: EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32165 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32179 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32193 PATTERN: EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32209 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32223 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32237 PATTERN: EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32253 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32267 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32281 PATTERN: EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32297 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32311 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32325 PATTERN: EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32341 PATTERN: EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
32355 PATTERN: EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
32369 PATTERN: EVV 0x9B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
32385 PATTERN: EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
32399 PATTERN: EVV 0x9B V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
32413 PATTERN: EVV 0x9B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
32429 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32443 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32457 PATTERN: EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32473 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32487 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32501 PATTERN: EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32517 PATTERN: EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
32531 PATTERN: EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
32545 PATTERN: EVV 0xAB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
32561 PATTERN: EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
32575 PATTERN: EVV 0xAB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
32589 PATTERN: EVV 0xAB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
32605 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32619 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32633 PATTERN: EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32649 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32663 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32677 PATTERN: EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32693 PATTERN: EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
32707 PATTERN: EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
32721 PATTERN: EVV 0xBB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
32737 PATTERN: EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
32751 PATTERN: EVV 0xBB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
32765 PATTERN: EVV 0xBB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
32781 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32795 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32809 PATTERN: EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32825 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32839 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32853 PATTERN: EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32869 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32883 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32897 PATTERN: EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
32913 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
32927 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32941 PATTERN: EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
32957 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
32971 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
32985 PATTERN: EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33001 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33015 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33029 PATTERN: EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
33045 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
33059 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33073 PATTERN: EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33089 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33103 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33117 PATTERN: EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
33133 PATTERN: EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
33147 PATTERN: EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33161 PATTERN: EVV 0x9D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
33177 PATTERN: EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
33191 PATTERN: EVV 0x9D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33205 PATTERN: EVV 0x9D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
33221 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
33235 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33249 PATTERN: EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33265 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33279 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33293 PATTERN: EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
33309 PATTERN: EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
33323 PATTERN: EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33337 PATTERN: EVV 0xAD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
33353 PATTERN: EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
33367 PATTERN: EVV 0xAD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33381 PATTERN: EVV 0xAD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
33397 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
33411 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33425 PATTERN: EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33441 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33455 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33469 PATTERN: EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
33485 PATTERN: EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
33499 PATTERN: EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33513 PATTERN: EVV 0xBD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
33529 PATTERN: EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
33543 PATTERN: EVV 0xBD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33557 PATTERN: EVV 0xBD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
33573 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
33587 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33601 PATTERN: EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33617 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33631 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33645 PATTERN: EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
33661 PATTERN: EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
33675 PATTERN: EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33689 PATTERN: EVV 0x9F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
33705 PATTERN: EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
33719 PATTERN: EVV 0x9F V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33733 PATTERN: EVV 0x9F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
33749 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
33763 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33777 PATTERN: EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33793 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33807 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33821 PATTERN: EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
33837 PATTERN: EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
33851 PATTERN: EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33865 PATTERN: EVV 0xAF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
33881 PATTERN: EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
33895 PATTERN: EVV 0xAF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
33909 PATTERN: EVV 0xAF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
33925 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
33939 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33953 PATTERN: EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
33969 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
33983 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
33997 PATTERN: EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
34013 PATTERN: EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
34027 PATTERN: EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
34041 PATTERN: EVV 0xBF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
34057 PATTERN: EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
34071 PATTERN: EVV 0xBF V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
34085 PATTERN: EVV 0xBF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
34101 PATTERN: EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
34117 PATTERN: EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
34133 PATTERN: EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
34149 PATTERN: EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
34165 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
34179 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
34193 PATTERN: EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
34209 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
34223 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
34237 PATTERN: EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
34253 PATTERN: EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
34267 PATTERN: EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1
34281 PATTERN: EVV 0x43 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
34297 PATTERN: EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
34311 PATTERN: EVV 0x43 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0
34325 PATTERN: EVV 0x43 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
34341 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
34355 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
34369 PATTERN: EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() …
34385 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
34399 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
34413 PATTERN: EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() …
34429 PATTERN: EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()
34443 PATTERN: EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1…
34457 PATTERN: EVV 0x27 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_…
34473 PATTERN: EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()
34487 PATTERN: EVV 0x27 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0…
34501 PATTERN: EVV 0x27 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_…
34517 PATTERN: EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
34531 PATTERN: EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() …
34547 PATTERN: EVV 0x1A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
34561 PATTERN: EVV 0x1A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() …
34577 PATTERN: EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
34591 PATTERN: EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() …
34607 PATTERN: EVV 0x3A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
34621 PATTERN: EVV 0x3A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() …
34636 PATTERN: EVV 0x21 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK…
34650 PATTERN: EVV 0x21 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING…
34666 PATTERN: EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
34680 PATTERN: EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1
34694 PATTERN: EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
34710 PATTERN: EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
34724 PATTERN: EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0
34738 PATTERN: EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
34754 PATTERN: EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
34768 PATTERN: EVV 0x5F VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1
34782 PATTERN: EVV 0x5F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
34798 PATTERN: EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
34812 PATTERN: EVV 0x5F VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0
34826 PATTERN: EVV 0x5F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
34842 PATTERN: EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
34856 PATTERN: EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1
34870 PATTERN: EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
34886 PATTERN: EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
34900 PATTERN: EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0
34914 PATTERN: EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
34930 PATTERN: EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
34944 PATTERN: EVV 0x5D VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1
34958 PATTERN: EVV 0x5D VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
34974 PATTERN: EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
34988 PATTERN: EVV 0x5D VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0
35002 PATTERN: EVV 0x5D VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
35018 PATTERN: EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35032 PATTERN: EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESI…
35048 PATTERN: EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35064 PATTERN: EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZER…
35080 PATTERN: EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35094 PATTERN: EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
35110 PATTERN: EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35126 PATTERN: EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
35141 PATTERN: EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 …
35155 PATTERN: EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
35170 PATTERN: EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=0 …
35184 PATTERN: EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
35200 PATTERN: EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35214 PATTERN: EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESI…
35230 PATTERN: EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35244 PATTERN: EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
35260 PATTERN: EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35276 PATTERN: EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
35292 PATTERN: EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35306 PATTERN: EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESI…
35322 PATTERN: EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35338 PATTERN: EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZER…
35354 PATTERN: EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35368 PATTERN: EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
35384 PATTERN: EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35400 PATTERN: EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
35416 PATTERN: EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35430 PATTERN: EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESI…
35446 PATTERN: EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
35462 PATTERN: EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZER…
35477 PATTERN: EVV 0x12 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0
35493 PATTERN: EVV 0x16 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 MASK=0…
35509 PATTERN: EVV 0x17 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
35525 PATTERN: EVV 0x16 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0…
35541 PATTERN: EVV 0x17 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
35556 PATTERN: EVV 0x16 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK=0
35572 PATTERN: EVV 0x12 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ZEROING=0 MASK=0…
35588 PATTERN: EVV 0x13 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
35604 PATTERN: EVV 0x12 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING=0…
35620 PATTERN: EVV 0x13 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
35636 PATTERN: EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
35652 PATTERN: EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
35668 PATTERN: EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZER…
35684 PATTERN: EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
35699 PATTERN: EVV 0x6E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR ZE…
35713 PATTERN: EVV 0x6E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 NOE…
35728 PATTERN: EVV 0x7E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR ZE…
35742 PATTERN: EVV 0x7E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 NOE…
35757 PATTERN: EVV 0x7E VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 MASK=0
35771 PATTERN: EVV 0x7E VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
35786 PATTERN: EVV 0xD6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 MASK=0
35800 PATTERN: EVV 0xD6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
35816 PATTERN: EVV 0x10 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ESIZE_64_B…
35832 PATTERN: EVV 0x11 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
35848 PATTERN: EVV 0x10 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
35864 PATTERN: EVV 0x11 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
35880 PATTERN: EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35894 PATTERN: EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
35910 PATTERN: EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
35924 PATTERN: EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
35940 PATTERN: EVV 0x10 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ESIZE_32_B…
35956 PATTERN: EVV 0x11 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
35972 PATTERN: EVV 0x10 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
35988 PATTERN: EVV 0x11 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
36004 PATTERN: EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
36018 PATTERN: EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESI…
36034 PATTERN: EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
36050 PATTERN: EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZER…
36066 PATTERN: EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
36080 PATTERN: EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
36096 PATTERN: EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
36112 PATTERN: EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
36128 PATTERN: EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
36142 PATTERN: EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
36156 PATTERN: EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
36172 PATTERN: EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
36186 PATTERN: EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
36200 PATTERN: EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
36216 PATTERN: EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
36230 PATTERN: EVV 0x59 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
36244 PATTERN: EVV 0x59 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
36260 PATTERN: EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
36274 PATTERN: EVV 0x59 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
36288 PATTERN: EVV 0x59 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
36304 PATTERN: EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
36318 PATTERN: EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
36334 PATTERN: EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
36348 PATTERN: EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
36364 PATTERN: EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
36378 PATTERN: EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
36394 PATTERN: EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
36408 PATTERN: EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
36424 PATTERN: EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
36438 PATTERN: EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
36454 PATTERN: EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
36468 PATTERN: EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
36484 PATTERN: EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
36498 PATTERN: EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
36514 PATTERN: EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
36528 PATTERN: EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
36544 PATTERN: EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
36558 PATTERN: EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
36574 PATTERN: EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
36588 PATTERN: EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
36604 PATTERN: EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
36620 PATTERN: EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
36636 PATTERN: EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
36652 PATTERN: EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
36668 PATTERN: EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
36684 PATTERN: EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 mode64 NOEVSR
36700 PATTERN: EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM…
36714 PATTERN: EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIM…
36730 PATTERN: EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0
36744 PATTERN: EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZ…
36760 PATTERN: EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0
36774 PATTERN: EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ES…
36790 PATTERN: EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0
36804 PATTERN: EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ESIZ…
36820 PATTERN: EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0
36834 PATTERN: EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ES…
36850 PATTERN: EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM…
36864 PATTERN: EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIM…
36880 PATTERN: EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM…
36894 PATTERN: EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 UIM…
36910 PATTERN: EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM…
36924 PATTERN: EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 UIM…
36940 PATTERN: EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
36956 PATTERN: EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
36972 PATTERN: EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR Z…
36988 PATTERN: EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
37004 PATTERN: EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37018 PATTERN: EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37034 PATTERN: EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37048 PATTERN: EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37064 PATTERN: EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37078 PATTERN: EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37094 PATTERN: EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37108 PATTERN: EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37124 PATTERN: EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37138 PATTERN: EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37154 PATTERN: EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
37168 PATTERN: EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() …
37184 PATTERN: EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37198 PATTERN: EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37214 PATTERN: EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
37228 PATTERN: EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() …
37244 PATTERN: EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37258 PATTERN: EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37274 PATTERN: EVV 0x01 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
37288 PATTERN: EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() …
37304 PATTERN: EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37318 PATTERN: EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37334 PATTERN: EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37348 PATTERN: EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37364 PATTERN: EVV 0x00 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
37378 PATTERN: EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() …
37394 PATTERN: EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37408 PATTERN: EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37424 PATTERN: EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37438 PATTERN: EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37454 PATTERN: EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37468 PATTERN: EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37484 PATTERN: EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37498 PATTERN: EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37514 PATTERN: EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37528 PATTERN: EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37544 PATTERN: EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
37560 PATTERN: EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
37576 PATTERN: EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
37592 PATTERN: EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
37608 PATTERN: EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
37624 PATTERN: EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
37640 PATTERN: EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
37656 PATTERN: EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
37672 PATTERN: EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37686 PATTERN: EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37702 PATTERN: EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37716 PATTERN: EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37732 PATTERN: EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37746 PATTERN: EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37762 PATTERN: EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37776 PATTERN: EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37792 PATTERN: EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37806 PATTERN: EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37822 PATTERN: EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37836 PATTERN: EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37852 PATTERN: EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
37866 PATTERN: EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
37882 PATTERN: EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
37896 PATTERN: EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
37912 PATTERN: EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
37928 PATTERN: EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
37944 PATTERN: EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
37960 PATTERN: EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
37976 PATTERN: EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
37992 PATTERN: EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38008 PATTERN: EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38024 PATTERN: EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38040 PATTERN: EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38056 PATTERN: EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38072 PATTERN: EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38088 PATTERN: EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38104 PATTERN: EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38120 PATTERN: EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38136 PATTERN: EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38152 PATTERN: EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38168 PATTERN: EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38184 PATTERN: EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38200 PATTERN: EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38216 PATTERN: EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38232 PATTERN: EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38246 PATTERN: EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38262 PATTERN: EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38276 PATTERN: EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38292 PATTERN: EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38306 PATTERN: EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
38322 PATTERN: EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38336 PATTERN: EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38352 PATTERN: EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38366 PATTERN: EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38382 PATTERN: EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38398 PATTERN: EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38414 PATTERN: EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38430 PATTERN: EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38446 PATTERN: EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38462 PATTERN: EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38478 PATTERN: EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38494 PATTERN: EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38510 PATTERN: EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38526 PATTERN: EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
38542 PATTERN: EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38556 PATTERN: EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38572 PATTERN: EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38586 PATTERN: EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38602 PATTERN: EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
38616 PATTERN: EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
38632 PATTERN: EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38646 PATTERN: EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38662 PATTERN: EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
38676 PATTERN: EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
38692 PATTERN: EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
38706 PATTERN: EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
38722 PATTERN: EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
38736 PATTERN: EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
38752 PATTERN: EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
38766 PATTERN: EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
38782 PATTERN: EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
38796 PATTERN: EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
38812 PATTERN: EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
38826 PATTERN: EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
38842 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL512 W0 UIMM8()
38856 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
38872 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL512 W1 UIMM8()
38886 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
38902 PATTERN: EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
38916 PATTERN: EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
38932 PATTERN: EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
38946 PATTERN: EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
38962 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL512 W0 UIMM8()
38976 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
38992 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL512 W1 UIMM8()
39006 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
39022 PATTERN: EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39036 PATTERN: EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
39052 PATTERN: EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39066 PATTERN: EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
39082 PATTERN: EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
39098 PATTERN: EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
39114 PATTERN: EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
39130 PATTERN: EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
39146 PATTERN: EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
39160 PATTERN: EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() E…
39176 PATTERN: EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39190 PATTERN: EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_…
39206 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W0 UIMM8()
39220 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
39236 PATTERN: EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39250 PATTERN: EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_64_…
39266 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 W1 UIMM8()
39280 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
39296 PATTERN: EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39310 PATTERN: EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
39326 PATTERN: EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39340 PATTERN: EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
39356 PATTERN: EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39370 PATTERN: EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_…
39386 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL512 W0 UIMM8()
39400 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
39416 PATTERN: EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39430 PATTERN: EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_64_…
39446 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL512 W1 UIMM8()
39460 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
39476 PATTERN: EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39490 PATTERN: EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
39506 PATTERN: EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39520 PATTERN: EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
39536 PATTERN: EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39550 PATTERN: EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_32_…
39566 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W0 UIMM8()
39580 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
39596 PATTERN: EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39610 PATTERN: EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_64_…
39626 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 W1 UIMM8()
39640 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
39656 PATTERN: EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39670 PATTERN: EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
39686 PATTERN: EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39700 PATTERN: EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
39716 PATTERN: EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39730 PATTERN: EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
39746 PATTERN: EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
39760 PATTERN: EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
39776 PATTERN: EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
39790 PATTERN: EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
39806 PATTERN: EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
39820 PATTERN: EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
39836 PATTERN: EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0
39850 PATTERN: EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ES…
39866 PATTERN: EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0
39880 PATTERN: EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ES…
39896 PATTERN: EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0
39910 PATTERN: EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ZEROING=0 ES…
39926 PATTERN: EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0
39940 PATTERN: EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ZEROING=0 ES…
39956 PATTERN: EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
39970 PATTERN: EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
39986 PATTERN: EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
40000 PATTERN: EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
40016 PATTERN: EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
40030 PATTERN: EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
40046 PATTERN: EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
40060 PATTERN: EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
40076 PATTERN: EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
40090 PATTERN: EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
40106 PATTERN: EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
40120 PATTERN: EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
40136 PATTERN: EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
40150 PATTERN: EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
40166 PATTERN: EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
40180 PATTERN: EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
40196 PATTERN: EVV 0x4D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
40210 PATTERN: EVV 0x4D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
40226 PATTERN: EVV 0x4D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
40240 PATTERN: EVV 0x4D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
40256 PATTERN: EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
40270 PATTERN: EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
40284 PATTERN: EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() …
40300 PATTERN: EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
40314 PATTERN: EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
40328 PATTERN: EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() …
40344 PATTERN: EVV 0x0B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()
40358 PATTERN: EVV 0x0B V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1…
40372 PATTERN: EVV 0x0B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_…
40388 PATTERN: EVV 0x0A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()
40402 PATTERN: EVV 0x0A V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0…
40416 PATTERN: EVV 0x0A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_…
40432 PATTERN: EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
40446 PATTERN: EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
40462 PATTERN: EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
40476 PATTERN: EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
40492 PATTERN: EVV 0x4F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
40506 PATTERN: EVV 0x4F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
40522 PATTERN: EVV 0x4F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
40536 PATTERN: EVV 0x4F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
40552 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
40566 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
40580 PATTERN: EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
40596 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
40610 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_RO…
40624 PATTERN: EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
40640 PATTERN: EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
40654 PATTERN: EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
40668 PATTERN: EVV 0x2D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS(…
40684 PATTERN: EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
40698 PATTERN: EVV 0x2D V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_RO…
40712 PATTERN: EVV 0x2D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS(…
40728 PATTERN: EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
40744 PATTERN: EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
40760 PATTERN: EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_…
40776 PATTERN: EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_…
40792 PATTERN: EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
40806 PATTERN: EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
40822 PATTERN: EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
40836 PATTERN: EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
40852 PATTERN: EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
40866 PATTERN: EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
40882 PATTERN: EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
40896 PATTERN: EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
40912 PATTERN: EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
40926 PATTERN: EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE_6…
40942 PATTERN: EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
40956 PATTERN: EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE_3…
40972 PATTERN: EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
40986 PATTERN: EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
41000 PATTERN: EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
41016 PATTERN: EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
41030 PATTERN: EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
41044 PATTERN: EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
41060 PATTERN: EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
41074 PATTERN: EVV 0x51 VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
41088 PATTERN: EVV 0x51 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
41104 PATTERN: EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
41118 PATTERN: EVV 0x51 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
41132 PATTERN: EVV 0x51 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
41148 PATTERN: EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
41162 PATTERN: EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
41176 PATTERN: EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
41192 PATTERN: EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
41206 PATTERN: EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
41220 PATTERN: EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
41236 PATTERN: EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1
41250 PATTERN: EVV 0x5C VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
41264 PATTERN: EVV 0x5C VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() …
41280 PATTERN: EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0
41294 PATTERN: EVV 0x5C VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() AVX512_ROUN…
41308 PATTERN: EVV 0x5C VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() …
41325 PATTERN: EVV 0x2E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 MASK=0
41340 PATTERN: EVV 0x2E V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 …
41355 PATTERN: EVV 0x2E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=0 …
41372 PATTERN: EVV 0x2E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 MASK=0
41387 PATTERN: EVV 0x2E VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 …
41402 PATTERN: EVV 0x2E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=0 …
41418 PATTERN: EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
41432 PATTERN: EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
41448 PATTERN: EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
41462 PATTERN: EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
41478 PATTERN: EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
41492 PATTERN: EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
41508 PATTERN: EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
41522 PATTERN: EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
41808 PATTERN: EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=…
41823 PATTERN: EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=…
41839 PATTERN: EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
41853 PATTERN: EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
41869 PATTERN: EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
41883 PATTERN: EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
41899 PATTERN: EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
41913 PATTERN: EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_3…
41929 PATTERN: EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
41943 PATTERN: EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_6…
41990 PATTERN: EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
42004 PATTERN: EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
42020 PATTERN: EVV 0x58 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
42034 PATTERN: EVV 0x58 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
42050 PATTERN: EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
42064 PATTERN: EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
42080 PATTERN: EVV 0x58 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
42094 PATTERN: EVV 0x58 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
42110 PATTERN: EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()
42124 PATTERN: EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
42140 PATTERN: EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
42154 PATTERN: EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
42170 PATTERN: EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()
42184 PATTERN: EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
42200 PATTERN: EVV 0x03 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
42214 PATTERN: EVV 0x03 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
42230 PATTERN: EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
42244 PATTERN: EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
42260 PATTERN: EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
42274 PATTERN: EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
42290 PATTERN: EVV 0x55 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
42304 PATTERN: EVV 0x55 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
42320 PATTERN: EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
42334 PATTERN: EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
42350 PATTERN: EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
42364 PATTERN: EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
42380 PATTERN: EVV 0x55 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
42394 PATTERN: EVV 0x55 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
42410 PATTERN: EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
42424 PATTERN: EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
42440 PATTERN: EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
42454 PATTERN: EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
42470 PATTERN: EVV 0x54 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
42484 PATTERN: EVV 0x54 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
42500 PATTERN: EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
42514 PATTERN: EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
42530 PATTERN: EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
42544 PATTERN: EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
42560 PATTERN: EVV 0x54 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
42574 PATTERN: EVV 0x54 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
42590 PATTERN: EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
42604 PATTERN: EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
42620 PATTERN: EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
42634 PATTERN: EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
42650 PATTERN: EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
42664 PATTERN: EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
42680 PATTERN: EVV 0x65 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
42694 PATTERN: EVV 0x65 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
42710 PATTERN: EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
42724 PATTERN: EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
42740 PATTERN: EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
42754 PATTERN: EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
42770 PATTERN: EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
42786 PATTERN: EVV 0x1B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
42802 PATTERN: EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR E…
42818 PATTERN: EVV 0x1A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
42834 PATTERN: EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
42848 PATTERN: EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
42864 PATTERN: EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
42878 PATTERN: EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
42894 PATTERN: EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
42908 PATTERN: EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
42924 PATTERN: EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
42940 PATTERN: EVV 0x5B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
42956 PATTERN: EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR E…
42972 PATTERN: EVV 0x5A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR E…
42988 PATTERN: EVV 0x19 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR E…
43004 PATTERN: EVV 0x19 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43020 PATTERN: EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
43036 PATTERN: EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43052 PATTERN: EVV 0x18 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
43068 PATTERN: EVV 0x18 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
43084 PATTERN: EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM8()
43098 PATTERN: EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIMM8…
43114 PATTERN: EVV 0xC2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM8()
43128 PATTERN: EVV 0xC2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIMM8…
43144 PATTERN: EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM8()
43158 PATTERN: EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIMM8…
43174 PATTERN: EVV 0xC2 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM8()
43188 PATTERN: EVV 0xC2 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIMM8…
43204 PATTERN: EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR Z…
43220 PATTERN: EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
43236 PATTERN: EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR Z…
43252 PATTERN: EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43268 PATTERN: EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
43284 PATTERN: EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43300 PATTERN: EVV 0x8A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
43316 PATTERN: EVV 0x8A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
43332 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43346 PATTERN: EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
43362 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
43376 PATTERN: EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
43392 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43406 PATTERN: EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
43422 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
43436 PATTERN: EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
43452 PATTERN: EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
43466 PATTERN: EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
43482 PATTERN: EVV 0xE6 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43496 PATTERN: EVV 0xE6 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
43512 PATTERN: EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
43526 PATTERN: EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
43542 PATTERN: EVV 0x5A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43556 PATTERN: EVV 0x5A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
43572 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
43586 PATTERN: EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
43602 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43616 PATTERN: EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
43632 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
43646 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
43660 PATTERN: EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
43676 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
43690 PATTERN: EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
43706 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43720 PATTERN: EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
43736 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
43750 PATTERN: EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
43766 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
43780 PATTERN: EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
43796 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
43810 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
43824 PATTERN: EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
43840 PATTERN: EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43854 PATTERN: EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
43870 PATTERN: EVV 0x13 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
43884 PATTERN: EVV 0x13 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
43900 PATTERN: EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43914 PATTERN: EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
43930 PATTERN: EVV 0x5B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
43944 PATTERN: EVV 0x5B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
43960 PATTERN: EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
43974 PATTERN: EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
43990 PATTERN: EVV 0x5A VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
44004 PATTERN: EVV 0x5A VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
44020 PATTERN: EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()
44036 PATTERN: EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
44052 PATTERN: EVV 0x1D V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
44068 PATTERN: EVV 0x1D V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
44084 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
44098 PATTERN: EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
44114 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
44128 PATTERN: EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
44144 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
44158 PATTERN: EVV 0x7B V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
44172 PATTERN: EVV 0x7B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
44188 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
44202 PATTERN: EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
44218 PATTERN: EVV 0x79 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
44232 PATTERN: EVV 0x79 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
44248 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
44262 PATTERN: EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
44278 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
44292 PATTERN: EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
44308 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
44322 PATTERN: EVV 0x79 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
44336 PATTERN: EVV 0x79 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
44352 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
44366 PATTERN: EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
44382 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
44396 PATTERN: EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
44412 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
44426 PATTERN: EVV 0xE6 VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
44440 PATTERN: EVV 0xE6 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
44456 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
44470 PATTERN: EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
44486 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
44500 PATTERN: EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
44516 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
44530 PATTERN: EVV 0x5B VNP V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
44544 PATTERN: EVV 0x5B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
44560 PATTERN: EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
44574 PATTERN: EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
44590 PATTERN: EVV 0xE6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
44604 PATTERN: EVV 0xE6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
44620 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
44634 PATTERN: EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
44650 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
44664 PATTERN: EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
44680 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
44694 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 …
44708 PATTERN: EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
44724 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
44738 PATTERN: EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
44754 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
44768 PATTERN: EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
44784 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
44798 PATTERN: EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
44814 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
44828 PATTERN: EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
44844 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
44858 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 …
44872 PATTERN: EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
44888 PATTERN: EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
44902 PATTERN: EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
44918 PATTERN: EVV 0x5B VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
44932 PATTERN: EVV 0x5B VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
44948 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
44962 PATTERN: EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
44978 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
44992 PATTERN: EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
45008 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
45022 PATTERN: EVV 0x7A V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 …
45036 PATTERN: EVV 0x7A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
45052 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
45066 PATTERN: EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
45082 PATTERN: EVV 0x78 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
45096 PATTERN: EVV 0x78 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
45112 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
45126 PATTERN: EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
45142 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
45156 PATTERN: EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
45172 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
45186 PATTERN: EVV 0x78 V66 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 …
45200 PATTERN: EVV 0x78 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_…
45216 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
45230 PATTERN: EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
45246 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
45260 PATTERN: EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
45276 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
45290 PATTERN: EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
45306 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
45320 PATTERN: EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
45336 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
45350 PATTERN: EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
45366 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
45380 PATTERN: EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
45396 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
45410 PATTERN: EVV 0x7A VF3 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
45424 PATTERN: EVV 0x7A VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
45440 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
45454 PATTERN: EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
45470 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
45484 PATTERN: EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
45500 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
45514 PATTERN: EVV 0x7A VF2 V0F MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() AVX512_ROUN…
45528 PATTERN: EVV 0x7A VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_…
45544 PATTERN: EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()
45558 PATTERN: EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 UIMM8() …
45574 PATTERN: EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
45588 PATTERN: EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 UIMM8() …
45604 PATTERN: EVV 0x42 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
45618 PATTERN: EVV 0x42 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() …
45634 PATTERN: EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
45648 PATTERN: EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
45664 PATTERN: EVV 0x5E V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
45678 PATTERN: EVV 0x5E V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
45694 PATTERN: EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
45708 PATTERN: EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
45724 PATTERN: EVV 0x5E VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
45738 PATTERN: EVV 0x5E VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
45754 PATTERN: EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR E…
45770 PATTERN: EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
45786 PATTERN: EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR E…
45802 PATTERN: EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
45818 PATTERN: EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
45834 PATTERN: EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
45850 PATTERN: EVV 0x88 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
45866 PATTERN: EVV 0x88 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
45882 PATTERN: EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
45898 PATTERN: EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
45914 PATTERN: EVV 0x1B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
45930 PATTERN: EVV 0x1B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
45946 PATTERN: EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
45962 PATTERN: EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR Z…
45978 PATTERN: EVV 0x19 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
45994 PATTERN: EVV 0x19 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR Z…
46010 PATTERN: EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
46026 PATTERN: EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
46042 PATTERN: EVV 0x3B V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
46058 PATTERN: EVV 0x3B V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
46074 PATTERN: EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
46090 PATTERN: EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR Z…
46106 PATTERN: EVV 0x39 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
46122 PATTERN: EVV 0x39 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR Z…
46138 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()
46152 PATTERN: EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
46168 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
46182 PATTERN: EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
46198 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()
46212 PATTERN: EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
46228 PATTERN: EVV 0x54 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
46242 PATTERN: EVV 0x54 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
46258 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46272 PATTERN: EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
46288 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
46302 PATTERN: EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
46318 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
46332 PATTERN: EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
46348 PATTERN: EVV 0x98 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
46362 PATTERN: EVV 0x98 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
46378 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46392 PATTERN: EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
46408 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
46422 PATTERN: EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
46438 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
46452 PATTERN: EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
46468 PATTERN: EVV 0xA8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
46482 PATTERN: EVV 0xA8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
46498 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46512 PATTERN: EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
46528 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
46542 PATTERN: EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
46558 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
46572 PATTERN: EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
46588 PATTERN: EVV 0xB8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
46602 PATTERN: EVV 0xB8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
46618 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46632 PATTERN: EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
46648 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
46662 PATTERN: EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
46678 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
46692 PATTERN: EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
46708 PATTERN: EVV 0x96 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
46722 PATTERN: EVV 0x96 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
46738 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46752 PATTERN: EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
46768 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
46782 PATTERN: EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
46798 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
46812 PATTERN: EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
46828 PATTERN: EVV 0xA6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
46842 PATTERN: EVV 0xA6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
46858 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46872 PATTERN: EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
46888 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
46902 PATTERN: EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
46918 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
46932 PATTERN: EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
46948 PATTERN: EVV 0xB6 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
46962 PATTERN: EVV 0xB6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
46978 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
46992 PATTERN: EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47008 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47022 PATTERN: EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47038 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47052 PATTERN: EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47068 PATTERN: EVV 0x9A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47082 PATTERN: EVV 0x9A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47098 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47112 PATTERN: EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47128 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47142 PATTERN: EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47158 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47172 PATTERN: EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47188 PATTERN: EVV 0xAA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47202 PATTERN: EVV 0xAA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47218 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47232 PATTERN: EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47248 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47262 PATTERN: EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47278 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47292 PATTERN: EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47308 PATTERN: EVV 0xBA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47322 PATTERN: EVV 0xBA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47338 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47352 PATTERN: EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47368 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47382 PATTERN: EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47398 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47412 PATTERN: EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47428 PATTERN: EVV 0x97 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47442 PATTERN: EVV 0x97 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47458 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47472 PATTERN: EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47488 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47502 PATTERN: EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47518 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47532 PATTERN: EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47548 PATTERN: EVV 0xA7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47562 PATTERN: EVV 0xA7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47578 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47592 PATTERN: EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47608 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47622 PATTERN: EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47638 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47652 PATTERN: EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47668 PATTERN: EVV 0xB7 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47682 PATTERN: EVV 0xB7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47698 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47712 PATTERN: EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47728 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47742 PATTERN: EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47758 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47772 PATTERN: EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47788 PATTERN: EVV 0x9C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47802 PATTERN: EVV 0x9C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47818 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47832 PATTERN: EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47848 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47862 PATTERN: EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47878 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
47892 PATTERN: EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
47908 PATTERN: EVV 0xAC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
47922 PATTERN: EVV 0xAC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
47938 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
47952 PATTERN: EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
47968 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
47982 PATTERN: EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
47998 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
48012 PATTERN: EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
48028 PATTERN: EVV 0xBC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
48042 PATTERN: EVV 0xBC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
48058 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
48072 PATTERN: EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
48088 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
48102 PATTERN: EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
48118 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
48132 PATTERN: EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
48148 PATTERN: EVV 0x9E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
48162 PATTERN: EVV 0x9E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
48178 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
48192 PATTERN: EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
48208 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
48222 PATTERN: EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
48238 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
48252 PATTERN: EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
48268 PATTERN: EVV 0xAE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
48282 PATTERN: EVV 0xAE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
48298 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
48312 PATTERN: EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
48328 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
48342 PATTERN: EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
48358 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
48372 PATTERN: EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
48388 PATTERN: EVV 0xBE V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
48402 PATTERN: EVV 0xBE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
48418 PATTERN: EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=…
48432 PATTERN: EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ZEROING…
48448 PATTERN: EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=…
48462 PATTERN: EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ZEROING…
48478 PATTERN: EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=…
48492 PATTERN: EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ZEROING…
48508 PATTERN: EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
48522 PATTERN: EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ZEROING…
48538 PATTERN: EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=…
48552 PATTERN: EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ZEROING…
48568 PATTERN: EVV 0x66 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=…
48582 PATTERN: EVV 0x66 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ZEROING…
48598 PATTERN: EVV 0x67 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 NOEVSR ZEROING=0 UIMM8…
48612 PATTERN: EVV 0x67 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 NOEVSR ZEROING=…
48628 PATTERN: EVV 0x67 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 NOEVSR ZEROING=0 UIMM8…
48642 PATTERN: EVV 0x67 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 NOEVSR ZEROING=…
48658 PATTERN: EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
48674 PATTERN: EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
48690 PATTERN: EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
48706 PATTERN: EVV 0x92 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
48722 PATTERN: EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
48738 PATTERN: EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
48754 PATTERN: EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
48770 PATTERN: EVV 0x93 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
48786 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
48800 PATTERN: EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_6…
48816 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
48830 PATTERN: EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_6…
48846 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
48860 PATTERN: EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_3…
48876 PATTERN: EVV 0x42 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
48890 PATTERN: EVV 0x42 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_3…
48906 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()
48920 PATTERN: EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() …
48936 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
48950 PATTERN: EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() …
48966 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()
48980 PATTERN: EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() …
48996 PATTERN: EVV 0x26 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
49010 PATTERN: EVV 0x26 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() …
49026 PATTERN: EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
49040 PATTERN: EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 UIMM8() …
49056 PATTERN: EVV 0x1A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
49070 PATTERN: EVV 0x1A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() …
49086 PATTERN: EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
49100 PATTERN: EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 UIMM8() …
49116 PATTERN: EVV 0x18 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
49130 PATTERN: EVV 0x18 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() …
49146 PATTERN: EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
49160 PATTERN: EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 UIMM8() …
49176 PATTERN: EVV 0x3A V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
49190 PATTERN: EVV 0x3A V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 UIMM8() …
49206 PATTERN: EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
49220 PATTERN: EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 UIMM8() …
49236 PATTERN: EVV 0x38 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
49250 PATTERN: EVV 0x38 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 UIMM8() …
49266 PATTERN: EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
49280 PATTERN: EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
49296 PATTERN: EVV 0x5F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
49310 PATTERN: EVV 0x5F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
49326 PATTERN: EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
49340 PATTERN: EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
49356 PATTERN: EVV 0x5F VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
49370 PATTERN: EVV 0x5F VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
49386 PATTERN: EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
49400 PATTERN: EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
49416 PATTERN: EVV 0x5D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
49430 PATTERN: EVV 0x5D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
49446 PATTERN: EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
49460 PATTERN: EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
49476 PATTERN: EVV 0x5D VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
49490 PATTERN: EVV 0x5D VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
49506 PATTERN: EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
49520 PATTERN: EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESI…
49536 PATTERN: EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
49552 PATTERN: EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZER…
49568 PATTERN: EVV 0x28 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
49582 PATTERN: EVV 0x28 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESI…
49598 PATTERN: EVV 0x29 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
49614 PATTERN: EVV 0x29 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZER…
49630 PATTERN: EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
49644 PATTERN: EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
49660 PATTERN: EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
49676 PATTERN: EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
49692 PATTERN: EVV 0x28 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
49706 PATTERN: EVV 0x28 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
49722 PATTERN: EVV 0x29 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
49738 PATTERN: EVV 0x29 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
49754 PATTERN: EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
49768 PATTERN: EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESI…
49784 PATTERN: EVV 0x12 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
49798 PATTERN: EVV 0x12 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESI…
49814 PATTERN: EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
49828 PATTERN: EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
49844 PATTERN: EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
49860 PATTERN: EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
49876 PATTERN: EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
49890 PATTERN: EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
49906 PATTERN: EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
49922 PATTERN: EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
49938 PATTERN: EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
49952 PATTERN: EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESI…
49968 PATTERN: EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
49984 PATTERN: EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZER…
50000 PATTERN: EVV 0x6F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
50014 PATTERN: EVV 0x6F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESI…
50030 PATTERN: EVV 0x7F V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
50046 PATTERN: EVV 0x7F V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZER…
50062 PATTERN: EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
50076 PATTERN: EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESI…
50092 PATTERN: EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
50108 PATTERN: EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZER…
50124 PATTERN: EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
50138 PATTERN: EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESI…
50154 PATTERN: EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
50170 PATTERN: EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZER…
50186 PATTERN: EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
50200 PATTERN: EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ESI…
50216 PATTERN: EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR
50232 PATTERN: EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 NOEVSR ZER…
50248 PATTERN: EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
50262 PATTERN: EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
50278 PATTERN: EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
50294 PATTERN: EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
50310 PATTERN: EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
50324 PATTERN: EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
50340 PATTERN: EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
50356 PATTERN: EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
50372 PATTERN: EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
50386 PATTERN: EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESI…
50402 PATTERN: EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
50418 PATTERN: EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZER…
50434 PATTERN: EVV 0x6F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
50448 PATTERN: EVV 0x6F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESI…
50464 PATTERN: EVV 0x7F VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
50480 PATTERN: EVV 0x7F VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZER…
50496 PATTERN: EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
50510 PATTERN: EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
50526 PATTERN: EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
50542 PATTERN: EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
50558 PATTERN: EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
50572 PATTERN: EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
50588 PATTERN: EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
50604 PATTERN: EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
50620 PATTERN: EVV 0x6F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
50634 PATTERN: EVV 0x6F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ESI…
50650 PATTERN: EVV 0x7F VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
50666 PATTERN: EVV 0x7F VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR ZER…
50682 PATTERN: EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
50698 PATTERN: EVV 0xE7 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
50714 PATTERN: EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
50730 PATTERN: EVV 0x2A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
50746 PATTERN: EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZER…
50762 PATTERN: EVV 0x2B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZER…
50778 PATTERN: EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
50794 PATTERN: EVV 0x2B VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
50810 PATTERN: EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
50824 PATTERN: EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
50840 PATTERN: EVV 0x16 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
50854 PATTERN: EVV 0x16 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
50870 PATTERN: EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
50884 PATTERN: EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
50900 PATTERN: EVV 0x12 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
50914 PATTERN: EVV 0x12 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
50930 PATTERN: EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
50944 PATTERN: EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ESI…
50960 PATTERN: EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
50976 PATTERN: EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR ZER…
50992 PATTERN: EVV 0x10 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
51006 PATTERN: EVV 0x10 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ESI…
51022 PATTERN: EVV 0x11 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
51038 PATTERN: EVV 0x11 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR ZER…
51054 PATTERN: EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
51068 PATTERN: EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ESI…
51084 PATTERN: EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
51100 PATTERN: EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR ZER…
51116 PATTERN: EVV 0x10 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
51130 PATTERN: EVV 0x10 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ESI…
51146 PATTERN: EVV 0x11 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
51162 PATTERN: EVV 0x11 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR ZER…
51178 PATTERN: EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
51192 PATTERN: EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
51208 PATTERN: EVV 0x59 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
51222 PATTERN: EVV 0x59 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
51238 PATTERN: EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
51252 PATTERN: EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
51268 PATTERN: EVV 0x59 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
51282 PATTERN: EVV 0x59 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
51298 PATTERN: EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
51312 PATTERN: EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
51328 PATTERN: EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
51342 PATTERN: EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
51358 PATTERN: EVV 0x56 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
51372 PATTERN: EVV 0x56 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
51388 PATTERN: EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
51402 PATTERN: EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
51418 PATTERN: EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
51432 PATTERN: EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
51448 PATTERN: EVV 0x56 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
51462 PATTERN: EVV 0x56 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
51478 PATTERN: EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
51492 PATTERN: EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
51508 PATTERN: EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
51522 PATTERN: EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
51538 PATTERN: EVV 0x1C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
51552 PATTERN: EVV 0x1C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
51568 PATTERN: EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
51582 PATTERN: EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_3…
51598 PATTERN: EVV 0x1E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
51612 PATTERN: EVV 0x1E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_3…
51628 PATTERN: EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
51642 PATTERN: EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_6…
51658 PATTERN: EVV 0x1F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
51672 PATTERN: EVV 0x1F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_6…
51688 PATTERN: EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
51702 PATTERN: EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
51718 PATTERN: EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
51732 PATTERN: EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
51748 PATTERN: EVV 0x1D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
51762 PATTERN: EVV 0x1D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
51778 PATTERN: EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
51792 PATTERN: EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
51808 PATTERN: EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
51822 PATTERN: EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
51838 PATTERN: EVV 0x6B V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
51852 PATTERN: EVV 0x6B V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
51868 PATTERN: EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
51882 PATTERN: EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
51898 PATTERN: EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
51912 PATTERN: EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
51928 PATTERN: EVV 0x63 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
51942 PATTERN: EVV 0x63 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
51958 PATTERN: EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
51972 PATTERN: EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
51988 PATTERN: EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
52002 PATTERN: EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
52018 PATTERN: EVV 0x2B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
52032 PATTERN: EVV 0x2B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS…
52048 PATTERN: EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52062 PATTERN: EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
52078 PATTERN: EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52092 PATTERN: EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
52108 PATTERN: EVV 0x67 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52122 PATTERN: EVV 0x67 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
52138 PATTERN: EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52152 PATTERN: EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
52168 PATTERN: EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52182 PATTERN: EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
52198 PATTERN: EVV 0xFC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52212 PATTERN: EVV 0xFC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
52228 PATTERN: EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
52242 PATTERN: EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
52258 PATTERN: EVV 0xFE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
52272 PATTERN: EVV 0xFE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
52288 PATTERN: EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
52302 PATTERN: EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
52318 PATTERN: EVV 0xD4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
52332 PATTERN: EVV 0xD4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
52348 PATTERN: EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52362 PATTERN: EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
52378 PATTERN: EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52392 PATTERN: EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
52408 PATTERN: EVV 0xEC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52422 PATTERN: EVV 0xEC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
52438 PATTERN: EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52452 PATTERN: EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
52468 PATTERN: EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52482 PATTERN: EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
52498 PATTERN: EVV 0xED V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52512 PATTERN: EVV 0xED V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
52528 PATTERN: EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52542 PATTERN: EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
52558 PATTERN: EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52572 PATTERN: EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
52588 PATTERN: EVV 0xDC V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52602 PATTERN: EVV 0xDC V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
52618 PATTERN: EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52632 PATTERN: EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
52648 PATTERN: EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52662 PATTERN: EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
52678 PATTERN: EVV 0xDD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52692 PATTERN: EVV 0xDD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
52708 PATTERN: EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
52722 PATTERN: EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
52738 PATTERN: EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
52752 PATTERN: EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
52768 PATTERN: EVV 0xFD V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
52782 PATTERN: EVV 0xFD V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
52798 PATTERN: EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 UIMM8()
52812 PATTERN: EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() E…
52828 PATTERN: EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 UIMM8()
52842 PATTERN: EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() E…
52858 PATTERN: EVV 0x0F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 UIMM8()
52872 PATTERN: EVV 0x0F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() E…
52888 PATTERN: EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
52902 PATTERN: EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
52918 PATTERN: EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
52932 PATTERN: EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
52948 PATTERN: EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
52962 PATTERN: EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
52978 PATTERN: EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
52992 PATTERN: EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
53008 PATTERN: EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
53022 PATTERN: EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
53038 PATTERN: EVV 0xDF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
53052 PATTERN: EVV 0xDF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
53068 PATTERN: EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
53082 PATTERN: EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
53098 PATTERN: EVV 0xDB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
53112 PATTERN: EVV 0xDB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
53128 PATTERN: EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
53142 PATTERN: EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
53158 PATTERN: EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
53172 PATTERN: EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
53188 PATTERN: EVV 0xE0 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
53202 PATTERN: EVV 0xE0 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
53218 PATTERN: EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
53232 PATTERN: EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
53248 PATTERN: EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
53262 PATTERN: EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
53278 PATTERN: EVV 0xE3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
53292 PATTERN: EVV 0xE3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
53308 PATTERN: EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
53322 PATTERN: EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8…
53338 PATTERN: EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
53352 PATTERN: EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8…
53368 PATTERN: EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
53382 PATTERN: EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8…
53398 PATTERN: EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
53412 PATTERN: EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
53428 PATTERN: EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
53442 PATTERN: EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
53458 PATTERN: EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
53472 PATTERN: EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
53488 PATTERN: EVV 0x64 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
53502 PATTERN: EVV 0x64 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
53518 PATTERN: EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
53532 PATTERN: EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
53548 PATTERN: EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
53562 PATTERN: EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
53578 PATTERN: EVV 0x66 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
53592 PATTERN: EVV 0x66 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
53608 PATTERN: EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
53622 PATTERN: EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
53638 PATTERN: EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
53654 PATTERN: EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
53668 PATTERN: EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
53684 PATTERN: EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
53700 PATTERN: EVV 0x78 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
53714 PATTERN: EVV 0x78 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
53730 PATTERN: EVV 0x7A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
53746 PATTERN: EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
53762 PATTERN: EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
53778 PATTERN: EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
53794 PATTERN: EVV 0x58 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
53810 PATTERN: EVV 0x58 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
53826 PATTERN: EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
53841 PATTERN: EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=…
53856 PATTERN: EVV 0x2A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=…
53871 PATTERN: EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
53886 PATTERN: EVV 0x3A VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=…
53902 PATTERN: EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR E…
53918 PATTERN: EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
53934 PATTERN: EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR
53950 PATTERN: EVV 0x59 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR E…
53966 PATTERN: EVV 0x59 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
53982 PATTERN: EVV 0x7C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 mode64 NOEVSR
53998 PATTERN: EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
54012 PATTERN: EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
54028 PATTERN: EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
54044 PATTERN: EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
54058 PATTERN: EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
54074 PATTERN: EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
54090 PATTERN: EVV 0x79 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
54104 PATTERN: EVV 0x79 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR E…
54120 PATTERN: EVV 0x7B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
54136 PATTERN: EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM…
54150 PATTERN: EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING…
54166 PATTERN: EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM…
54180 PATTERN: EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING…
54196 PATTERN: EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM…
54210 PATTERN: EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING…
54226 PATTERN: EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM…
54240 PATTERN: EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIM…
54256 PATTERN: EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM…
54270 PATTERN: EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIM…
54286 PATTERN: EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0
54300 PATTERN: EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 …
54316 PATTERN: EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0
54330 PATTERN: EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 …
54346 PATTERN: EVV 0x74 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0
54360 PATTERN: EVV 0x74 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 …
54376 PATTERN: EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0
54390 PATTERN: EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZ…
54406 PATTERN: EVV 0x76 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0
54420 PATTERN: EVV 0x76 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZ…
54436 PATTERN: EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0
54450 PATTERN: EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ES…
54466 PATTERN: EVV 0x29 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0
54480 PATTERN: EVV 0x29 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ES…
54496 PATTERN: EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0
54510 PATTERN: EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 …
54526 PATTERN: EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0
54540 PATTERN: EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 …
54556 PATTERN: EVV 0x75 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0
54570 PATTERN: EVV 0x75 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 …
54586 PATTERN: EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0
54600 PATTERN: EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 …
54616 PATTERN: EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0
54630 PATTERN: EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 …
54646 PATTERN: EVV 0x64 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0
54660 PATTERN: EVV 0x64 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 …
54676 PATTERN: EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0
54690 PATTERN: EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ESIZ…
54706 PATTERN: EVV 0x66 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0
54720 PATTERN: EVV 0x66 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ESIZ…
54736 PATTERN: EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0
54750 PATTERN: EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ES…
54766 PATTERN: EVV 0x37 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0
54780 PATTERN: EVV 0x37 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ES…
54796 PATTERN: EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0
54810 PATTERN: EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 …
54826 PATTERN: EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0
54840 PATTERN: EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 …
54856 PATTERN: EVV 0x65 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0
54870 PATTERN: EVV 0x65 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 …
54886 PATTERN: EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM…
54900 PATTERN: EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIM…
54916 PATTERN: EVV 0x1F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM…
54930 PATTERN: EVV 0x1F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIM…
54946 PATTERN: EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM…
54960 PATTERN: EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING…
54976 PATTERN: EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM…
54990 PATTERN: EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING…
55006 PATTERN: EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0 UIMM…
55020 PATTERN: EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING…
55036 PATTERN: EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 UIMM…
55050 PATTERN: EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 UIM…
55066 PATTERN: EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0 UIMM…
55080 PATTERN: EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 UIM…
55096 PATTERN: EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM…
55110 PATTERN: EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 UIM…
55126 PATTERN: EVV 0x1E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM…
55140 PATTERN: EVV 0x1E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 UIM…
55156 PATTERN: EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM…
55170 PATTERN: EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING…
55186 PATTERN: EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM…
55200 PATTERN: EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING…
55216 PATTERN: EVV 0x3E V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM…
55230 PATTERN: EVV 0x3E V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING…
55246 PATTERN: EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0 UIMM…
55260 PATTERN: EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING…
55276 PATTERN: EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0 UIMM…
55290 PATTERN: EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING…
55306 PATTERN: EVV 0x3F V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0 UIMM…
55320 PATTERN: EVV 0x3F V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING…
55336 PATTERN: EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
55352 PATTERN: EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
55368 PATTERN: EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
55384 PATTERN: EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
55400 PATTERN: EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR Z…
55416 PATTERN: EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
55432 PATTERN: EVV 0x8B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR Z…
55448 PATTERN: EVV 0x8B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
55464 PATTERN: EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
55478 PATTERN: EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_3…
55494 PATTERN: EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
55508 PATTERN: EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_3…
55524 PATTERN: EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
55538 PATTERN: EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_6…
55554 PATTERN: EVV 0xC4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
55568 PATTERN: EVV 0xC4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_6…
55584 PATTERN: EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
55598 PATTERN: EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
55614 PATTERN: EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
55628 PATTERN: EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
55644 PATTERN: EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
55658 PATTERN: EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
55674 PATTERN: EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
55688 PATTERN: EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
55704 PATTERN: EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
55718 PATTERN: EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
55734 PATTERN: EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
55748 PATTERN: EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
55764 PATTERN: EVV 0x77 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
55778 PATTERN: EVV 0x77 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
55794 PATTERN: EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
55808 PATTERN: EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
55824 PATTERN: EVV 0x76 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
55838 PATTERN: EVV 0x76 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
55854 PATTERN: EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
55868 PATTERN: EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
55884 PATTERN: EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
55898 PATTERN: EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
55914 PATTERN: EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
55928 PATTERN: EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
55944 PATTERN: EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()
55958 PATTERN: EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() …
55974 PATTERN: EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
55988 PATTERN: EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
56004 PATTERN: EVV 0x05 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
56018 PATTERN: EVV 0x05 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() …
56034 PATTERN: EVV 0x0D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56048 PATTERN: EVV 0x0D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
56064 PATTERN: EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()
56078 PATTERN: EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() …
56094 PATTERN: EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
56108 PATTERN: EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
56124 PATTERN: EVV 0x04 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
56138 PATTERN: EVV 0x04 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() …
56154 PATTERN: EVV 0x0C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
56168 PATTERN: EVV 0x0C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
56184 PATTERN: EVV 0x01 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
56198 PATTERN: EVV 0x01 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() …
56214 PATTERN: EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56228 PATTERN: EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
56244 PATTERN: EVV 0x16 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
56258 PATTERN: EVV 0x16 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
56274 PATTERN: EVV 0x00 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
56288 PATTERN: EVV 0x00 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() …
56304 PATTERN: EVV 0x36 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56318 PATTERN: EVV 0x36 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
56334 PATTERN: EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
56348 PATTERN: EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
56364 PATTERN: EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
56378 PATTERN: EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
56394 PATTERN: EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
56408 PATTERN: EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
56424 PATTERN: EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56438 PATTERN: EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
56454 PATTERN: EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
56468 PATTERN: EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
56484 PATTERN: EVV 0x7F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
56498 PATTERN: EVV 0x7F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
56514 PATTERN: EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
56528 PATTERN: EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
56544 PATTERN: EVV 0x7E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56558 PATTERN: EVV 0x7E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
56574 PATTERN: EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
56588 PATTERN: EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
56604 PATTERN: EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56618 PATTERN: EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
56634 PATTERN: EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
56648 PATTERN: EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
56664 PATTERN: EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
56678 PATTERN: EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
56694 PATTERN: EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
56708 PATTERN: EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
56724 PATTERN: EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
56738 PATTERN: EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
56754 PATTERN: EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
56770 PATTERN: EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
56786 PATTERN: EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
56802 PATTERN: EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
56818 PATTERN: EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 NOEVSR E…
56834 PATTERN: EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
56850 PATTERN: EVV 0x89 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 NOEVSR E…
56866 PATTERN: EVV 0x89 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
56881 PATTERN: EVV 0x14 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 …
56895 PATTERN: EVV 0x14 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZER…
56910 PATTERN: EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
56924 PATTERN: EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
56939 PATTERN: EVV 0x16 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 NOEVSR …
56953 PATTERN: EVV 0x16 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 N…
56968 PATTERN: EVV 0x15 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 …
56982 PATTERN: EVV 0x15 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ZER…
56997 PATTERN: EVV 0xC5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR ZEROING=0 MA…
57013 PATTERN: EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
57029 PATTERN: EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
57045 PATTERN: EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
57061 PATTERN: EVV 0x90 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
57077 PATTERN: EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
57093 PATTERN: EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
57109 PATTERN: EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
57125 PATTERN: EVV 0x91 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
57140 PATTERN: EVV 0x20 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0…
57154 PATTERN: EVV 0x20 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0…
57169 PATTERN: EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0 MASK…
57183 PATTERN: EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING…
57198 PATTERN: EVV 0x22 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 mode64 ZEROIN…
57212 PATTERN: EVV 0x22 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 mode64 …
57227 PATTERN: EVV 0xC4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0 U…
57241 PATTERN: EVV 0xC4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 M…
57257 PATTERN: EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
57271 PATTERN: EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_3…
57287 PATTERN: EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
57301 PATTERN: EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_3…
57317 PATTERN: EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
57331 PATTERN: EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_6…
57347 PATTERN: EVV 0x44 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
57361 PATTERN: EVV 0x44 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_6…
57377 PATTERN: EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
57391 PATTERN: EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_…
57407 PATTERN: EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
57421 PATTERN: EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_…
57437 PATTERN: EVV 0x04 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
57451 PATTERN: EVV 0x04 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_…
57467 PATTERN: EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
57481 PATTERN: EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
57497 PATTERN: EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
57511 PATTERN: EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
57527 PATTERN: EVV 0xF5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
57541 PATTERN: EVV 0xF5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
57557 PATTERN: EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
57571 PATTERN: EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_B…
57587 PATTERN: EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
57601 PATTERN: EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_B…
57617 PATTERN: EVV 0x3C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
57631 PATTERN: EVV 0x3C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_B…
57647 PATTERN: EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
57661 PATTERN: EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
57677 PATTERN: EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
57691 PATTERN: EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
57707 PATTERN: EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
57721 PATTERN: EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
57737 PATTERN: EVV 0x3D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
57751 PATTERN: EVV 0x3D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
57767 PATTERN: EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
57781 PATTERN: EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
57797 PATTERN: EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
57811 PATTERN: EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
57827 PATTERN: EVV 0xEE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
57841 PATTERN: EVV 0xEE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
57857 PATTERN: EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
57871 PATTERN: EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
57887 PATTERN: EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
57901 PATTERN: EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
57917 PATTERN: EVV 0xDE V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
57931 PATTERN: EVV 0xDE V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
57947 PATTERN: EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
57961 PATTERN: EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
57977 PATTERN: EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
57991 PATTERN: EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
58007 PATTERN: EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
58021 PATTERN: EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
58037 PATTERN: EVV 0x3F V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
58051 PATTERN: EVV 0x3F V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
58067 PATTERN: EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
58081 PATTERN: EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_…
58097 PATTERN: EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
58111 PATTERN: EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_…
58127 PATTERN: EVV 0x3E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
58141 PATTERN: EVV 0x3E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_…
58157 PATTERN: EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
58171 PATTERN: EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_B…
58187 PATTERN: EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
58201 PATTERN: EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_B…
58217 PATTERN: EVV 0x38 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
58231 PATTERN: EVV 0x38 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_B…
58247 PATTERN: EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
58261 PATTERN: EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
58277 PATTERN: EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
58291 PATTERN: EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
58307 PATTERN: EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
58321 PATTERN: EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
58337 PATTERN: EVV 0x39 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
58351 PATTERN: EVV 0x39 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
58367 PATTERN: EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
58381 PATTERN: EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
58397 PATTERN: EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
58411 PATTERN: EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
58427 PATTERN: EVV 0xEA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
58441 PATTERN: EVV 0xEA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
58457 PATTERN: EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
58471 PATTERN: EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
58487 PATTERN: EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
58501 PATTERN: EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
58517 PATTERN: EVV 0xDA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
58531 PATTERN: EVV 0xDA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
58547 PATTERN: EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
58561 PATTERN: EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
58577 PATTERN: EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
58591 PATTERN: EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
58607 PATTERN: EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
58621 PATTERN: EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
58637 PATTERN: EVV 0x3B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
58651 PATTERN: EVV 0x3B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
58667 PATTERN: EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
58681 PATTERN: EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_…
58697 PATTERN: EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
58711 PATTERN: EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_…
58727 PATTERN: EVV 0x3A V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
58741 PATTERN: EVV 0x3A V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_…
58756 PATTERN: EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
58771 PATTERN: EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=…
58786 PATTERN: EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=…
58801 PATTERN: EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
58816 PATTERN: EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=…
58831 PATTERN: EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=…
58847 PATTERN: EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
58863 PATTERN: EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
58879 PATTERN: EVV 0x31 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
58895 PATTERN: EVV 0x31 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
58911 PATTERN: EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
58927 PATTERN: EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
58943 PATTERN: EVV 0x33 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
58959 PATTERN: EVV 0x33 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
58974 PATTERN: EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
58989 PATTERN: EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=…
59004 PATTERN: EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=…
59019 PATTERN: EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR ZEROING=…
59034 PATTERN: EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR ZEROING=…
59049 PATTERN: EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR ZEROING=…
59064 PATTERN: EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=…
59079 PATTERN: EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=…
59094 PATTERN: EVV 0x38 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=…
59109 PATTERN: EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=…
59124 PATTERN: EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=…
59139 PATTERN: EVV 0x28 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=…
59154 PATTERN: EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=…
59169 PATTERN: EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=…
59184 PATTERN: EVV 0x39 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=…
59200 PATTERN: EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59216 PATTERN: EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59232 PATTERN: EVV 0x32 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59248 PATTERN: EVV 0x32 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59264 PATTERN: EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59280 PATTERN: EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59296 PATTERN: EVV 0x35 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59312 PATTERN: EVV 0x35 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59328 PATTERN: EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59344 PATTERN: EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59360 PATTERN: EVV 0x34 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59376 PATTERN: EVV 0x34 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59392 PATTERN: EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59408 PATTERN: EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59424 PATTERN: EVV 0x21 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59440 PATTERN: EVV 0x21 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59456 PATTERN: EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59472 PATTERN: EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59488 PATTERN: EVV 0x23 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59504 PATTERN: EVV 0x23 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59520 PATTERN: EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59536 PATTERN: EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59552 PATTERN: EVV 0x22 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59568 PATTERN: EVV 0x22 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59584 PATTERN: EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59600 PATTERN: EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59616 PATTERN: EVV 0x25 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59632 PATTERN: EVV 0x25 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59648 PATTERN: EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59664 PATTERN: EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59680 PATTERN: EVV 0x24 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59696 PATTERN: EVV 0x24 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59712 PATTERN: EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
59728 PATTERN: EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
59744 PATTERN: EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
59760 PATTERN: EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
59776 PATTERN: EVV 0x20 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
59792 PATTERN: EVV 0x20 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
59808 PATTERN: EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
59822 PATTERN: EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
59838 PATTERN: EVV 0x21 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
59852 PATTERN: EVV 0x21 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
59868 PATTERN: EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
59882 PATTERN: EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
59898 PATTERN: EVV 0x22 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
59912 PATTERN: EVV 0x22 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
59928 PATTERN: EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
59942 PATTERN: EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
59958 PATTERN: EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
59972 PATTERN: EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
59988 PATTERN: EVV 0x20 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
60002 PATTERN: EVV 0x20 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
60018 PATTERN: EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60032 PATTERN: EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
60048 PATTERN: EVV 0x25 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60062 PATTERN: EVV 0x25 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
60078 PATTERN: EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
60092 PATTERN: EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
60108 PATTERN: EVV 0x23 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
60122 PATTERN: EVV 0x23 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
60138 PATTERN: EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
60152 PATTERN: EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
60168 PATTERN: EVV 0x24 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
60182 PATTERN: EVV 0x24 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
60198 PATTERN: EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60214 PATTERN: EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60230 PATTERN: EVV 0x11 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60246 PATTERN: EVV 0x11 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60262 PATTERN: EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60278 PATTERN: EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60294 PATTERN: EVV 0x13 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60310 PATTERN: EVV 0x13 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60326 PATTERN: EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60342 PATTERN: EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60358 PATTERN: EVV 0x12 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60374 PATTERN: EVV 0x12 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60390 PATTERN: EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60406 PATTERN: EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60422 PATTERN: EVV 0x15 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60438 PATTERN: EVV 0x15 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60454 PATTERN: EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60470 PATTERN: EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60486 PATTERN: EVV 0x14 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60502 PATTERN: EVV 0x14 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60518 PATTERN: EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60534 PATTERN: EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60550 PATTERN: EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60566 PATTERN: EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60582 PATTERN: EVV 0x10 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
60598 PATTERN: EVV 0x10 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
60613 PATTERN: EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR ZEROING=…
60628 PATTERN: EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR ZEROING=…
60643 PATTERN: EVV 0x29 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR ZEROING=…
60659 PATTERN: EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60675 PATTERN: EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR Z…
60691 PATTERN: EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
60707 PATTERN: EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR Z…
60723 PATTERN: EVV 0x30 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR
60739 PATTERN: EVV 0x30 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 NOEVSR Z…
60755 PATTERN: EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
60769 PATTERN: EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
60785 PATTERN: EVV 0x31 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
60799 PATTERN: EVV 0x31 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
60815 PATTERN: EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
60829 PATTERN: EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
60845 PATTERN: EVV 0x32 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
60859 PATTERN: EVV 0x32 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
60875 PATTERN: EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
60889 PATTERN: EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
60905 PATTERN: EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
60919 PATTERN: EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
60935 PATTERN: EVV 0x30 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR
60949 PATTERN: EVV 0x30 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR ESI…
60965 PATTERN: EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
60979 PATTERN: EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 NOEVSR E…
60995 PATTERN: EVV 0x35 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
61009 PATTERN: EVV 0x35 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 NOEVSR E…
61025 PATTERN: EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
61039 PATTERN: EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
61055 PATTERN: EVV 0x33 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
61069 PATTERN: EVV 0x33 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
61085 PATTERN: EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR
61099 PATTERN: EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR ESI…
61115 PATTERN: EVV 0x34 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR
61129 PATTERN: EVV 0x34 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR ESI…
61145 PATTERN: EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
61159 PATTERN: EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
61175 PATTERN: EVV 0x28 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
61189 PATTERN: EVV 0x28 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
61205 PATTERN: EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
61219 PATTERN: EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_…
61235 PATTERN: EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
61249 PATTERN: EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_…
61265 PATTERN: EVV 0x0B V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
61279 PATTERN: EVV 0x0B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_…
61295 PATTERN: EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
61309 PATTERN: EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
61325 PATTERN: EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
61339 PATTERN: EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
61355 PATTERN: EVV 0xE4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
61369 PATTERN: EVV 0xE4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
61385 PATTERN: EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
61399 PATTERN: EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
61415 PATTERN: EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
61429 PATTERN: EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
61445 PATTERN: EVV 0xE5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
61459 PATTERN: EVV 0xE5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
61475 PATTERN: EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
61489 PATTERN: EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
61505 PATTERN: EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
61519 PATTERN: EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
61535 PATTERN: EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
61549 PATTERN: EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
61565 PATTERN: EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
61579 PATTERN: EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
61595 PATTERN: EVV 0x40 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
61609 PATTERN: EVV 0x40 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
61625 PATTERN: EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
61639 PATTERN: EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
61655 PATTERN: EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
61669 PATTERN: EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
61685 PATTERN: EVV 0xD5 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
61699 PATTERN: EVV 0xD5 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
61715 PATTERN: EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
61729 PATTERN: EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
61745 PATTERN: EVV 0xF4 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
61759 PATTERN: EVV 0xF4 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
61775 PATTERN: EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
61789 PATTERN: EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
61805 PATTERN: EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
61819 PATTERN: EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
61835 PATTERN: EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
61849 PATTERN: EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
61865 PATTERN: EVV 0xEB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
61879 PATTERN: EVV 0xEB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
61895 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL128 W0 UIMM8()
61909 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
61925 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL256 W0 UIMM8()
61939 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
61955 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL128 W1 UIMM8()
61969 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
61985 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b001] RM[nnn] VL256 W1 UIMM8()
61999 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
62015 PATTERN: EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
62029 PATTERN: EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
62045 PATTERN: EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
62059 PATTERN: EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
62075 PATTERN: EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
62089 PATTERN: EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
62105 PATTERN: EVV 0x15 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
62119 PATTERN: EVV 0x15 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
62135 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL128 W0 UIMM8()
62149 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
62165 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL256 W0 UIMM8()
62179 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
62195 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL128 W1 UIMM8()
62209 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
62225 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b000] RM[nnn] VL256 W1 UIMM8()
62239 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
62255 PATTERN: EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
62269 PATTERN: EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
62285 PATTERN: EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
62299 PATTERN: EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
62315 PATTERN: EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
62329 PATTERN: EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
62345 PATTERN: EVV 0x14 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
62359 PATTERN: EVV 0x14 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
62374 PATTERN: EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 ZEROING=0 MASK=0
62388 PATTERN: EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0 M…
62403 PATTERN: EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 ZEROING=0 MASK=0
62417 PATTERN: EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0 M…
62432 PATTERN: EVV 0xF6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 ZEROING=0 MASK=0
62446 PATTERN: EVV 0xF6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0 M…
62462 PATTERN: EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
62478 PATTERN: EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
62494 PATTERN: EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
62510 PATTERN: EVV 0xA0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
62526 PATTERN: EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
62542 PATTERN: EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
62558 PATTERN: EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
62574 PATTERN: EVV 0xA1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
62590 PATTERN: EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
62604 PATTERN: EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_B…
62620 PATTERN: EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
62634 PATTERN: EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_B…
62650 PATTERN: EVV 0x00 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
62664 PATTERN: EVV 0x00 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_B…
62680 PATTERN: EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()
62694 PATTERN: EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() E…
62710 PATTERN: EVV 0x70 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
62724 PATTERN: EVV 0x70 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() E…
62740 PATTERN: EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR UIMM8()
62754 PATTERN: EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR UIMM8(…
62770 PATTERN: EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR UIMM8()
62784 PATTERN: EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR UIMM8(…
62800 PATTERN: EVV 0x70 VF3 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR UIMM8()
62814 PATTERN: EVV 0x70 VF3 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR UIMM8(…
62830 PATTERN: EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 NOEVSR UIMM8()
62844 PATTERN: EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 NOEVSR UIMM8(…
62860 PATTERN: EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 NOEVSR UIMM8()
62874 PATTERN: EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 NOEVSR UIMM8(…
62890 PATTERN: EVV 0x70 VF2 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 NOEVSR UIMM8()
62904 PATTERN: EVV 0x70 VF2 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 NOEVSR UIMM8(…
62920 PATTERN: EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
62934 PATTERN: EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_32_…
62950 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W0 UIMM8()
62964 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
62980 PATTERN: EVV 0xF2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
62994 PATTERN: EVV 0xF2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_32_…
63010 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W0 UIMM8()
63024 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
63039 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL128 ZEROING=0 MASK=0…
63053 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0…
63068 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL256 ZEROING=0 MASK=0…
63082 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0…
63097 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b111] RM[nnn] VL512 ZEROING=0 MASK=0…
63111 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b111] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0…
63127 PATTERN: EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
63141 PATTERN: EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_64_…
63157 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 W1 UIMM8()
63171 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
63187 PATTERN: EVV 0xF3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
63201 PATTERN: EVV 0xF3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_64_…
63217 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 W1 UIMM8()
63231 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
63247 PATTERN: EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
63261 PATTERN: EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
63277 PATTERN: EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
63291 PATTERN: EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
63307 PATTERN: EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
63321 PATTERN: EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
63337 PATTERN: EVV 0x47 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
63351 PATTERN: EVV 0x47 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
63367 PATTERN: EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
63381 PATTERN: EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
63397 PATTERN: EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
63411 PATTERN: EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
63427 PATTERN: EVV 0x12 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
63441 PATTERN: EVV 0x12 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
63457 PATTERN: EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
63471 PATTERN: EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
63487 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL128 UIMM8()
63501 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() E…
63517 PATTERN: EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
63531 PATTERN: EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
63547 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL256 UIMM8()
63561 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() E…
63577 PATTERN: EVV 0xF1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
63591 PATTERN: EVV 0xF1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
63607 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b110] RM[nnn] VL512 UIMM8()
63621 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() E…
63637 PATTERN: EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
63651 PATTERN: EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_32_…
63667 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL128 W0 UIMM8()
63681 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
63697 PATTERN: EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
63711 PATTERN: EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_32_…
63727 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL256 W0 UIMM8()
63741 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
63757 PATTERN: EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
63771 PATTERN: EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_64_…
63787 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL128 W1 UIMM8()
63801 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
63817 PATTERN: EVV 0xE2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
63831 PATTERN: EVV 0xE2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_64_…
63847 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL256 W1 UIMM8()
63861 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
63877 PATTERN: EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
63891 PATTERN: EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
63907 PATTERN: EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
63921 PATTERN: EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
63937 PATTERN: EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
63951 PATTERN: EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
63967 PATTERN: EVV 0x46 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
63981 PATTERN: EVV 0x46 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
63997 PATTERN: EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
64011 PATTERN: EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
64027 PATTERN: EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
64041 PATTERN: EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
64057 PATTERN: EVV 0x11 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
64071 PATTERN: EVV 0x11 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
64087 PATTERN: EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
64101 PATTERN: EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
64117 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL128 UIMM8()
64131 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() E…
64147 PATTERN: EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
64161 PATTERN: EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
64177 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL256 UIMM8()
64191 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() E…
64207 PATTERN: EVV 0xE1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
64221 PATTERN: EVV 0xE1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
64237 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b100] RM[nnn] VL512 UIMM8()
64251 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b100] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() E…
64267 PATTERN: EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
64281 PATTERN: EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_32_…
64297 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W0 UIMM8()
64311 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
64327 PATTERN: EVV 0xD2 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
64341 PATTERN: EVV 0xD2 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_32_…
64357 PATTERN: EVV 0x72 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W0 UIMM8()
64371 PATTERN: EVV 0x72 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
64386 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL128 ZEROING=0 MASK=0…
64400 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL128 ZEROING=0…
64415 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL256 ZEROING=0 MASK=0…
64429 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL256 ZEROING=0…
64444 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b011] RM[nnn] VL512 ZEROING=0 MASK=0…
64458 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b011] RM[nnn] BCRC=0 MODRM() VL512 ZEROING=0…
64474 PATTERN: EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
64488 PATTERN: EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_64_…
64504 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 W1 UIMM8()
64518 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
64534 PATTERN: EVV 0xD3 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
64548 PATTERN: EVV 0xD3 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_64_…
64564 PATTERN: EVV 0x73 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 W1 UIMM8()
64578 PATTERN: EVV 0x73 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
64594 PATTERN: EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
64608 PATTERN: EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
64624 PATTERN: EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
64638 PATTERN: EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
64654 PATTERN: EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
64668 PATTERN: EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
64684 PATTERN: EVV 0x45 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
64698 PATTERN: EVV 0x45 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
64714 PATTERN: EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
64728 PATTERN: EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ESIZE_1…
64744 PATTERN: EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
64758 PATTERN: EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ESIZE_1…
64774 PATTERN: EVV 0x10 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
64788 PATTERN: EVV 0x10 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ESIZE_1…
64804 PATTERN: EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
64818 PATTERN: EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
64834 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL128 UIMM8()
64848 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM() VL128 UIMM8() E…
64864 PATTERN: EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
64878 PATTERN: EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
64894 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL256 UIMM8()
64908 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM() VL256 UIMM8() E…
64924 PATTERN: EVV 0xD1 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
64938 PATTERN: EVV 0xD1 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
64954 PATTERN: EVV 0x71 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[0b010] RM[nnn] VL512 UIMM8()
64968 PATTERN: EVV 0x71 V66 V0F MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 MODRM() VL512 UIMM8() E…
64984 PATTERN: EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
64998 PATTERN: EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
65014 PATTERN: EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
65028 PATTERN: EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
65044 PATTERN: EVV 0xF8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
65058 PATTERN: EVV 0xF8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
65074 PATTERN: EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
65088 PATTERN: EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
65104 PATTERN: EVV 0xFA V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
65118 PATTERN: EVV 0xFA V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
65134 PATTERN: EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
65148 PATTERN: EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
65164 PATTERN: EVV 0xFB V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
65178 PATTERN: EVV 0xFB V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
65194 PATTERN: EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
65208 PATTERN: EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
65224 PATTERN: EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
65238 PATTERN: EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
65254 PATTERN: EVV 0xE8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
65268 PATTERN: EVV 0xE8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
65284 PATTERN: EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
65298 PATTERN: EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
65314 PATTERN: EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
65328 PATTERN: EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
65344 PATTERN: EVV 0xE9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
65358 PATTERN: EVV 0xE9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
65374 PATTERN: EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
65388 PATTERN: EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
65404 PATTERN: EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
65418 PATTERN: EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
65434 PATTERN: EVV 0xD8 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
65448 PATTERN: EVV 0xD8 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
65464 PATTERN: EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
65478 PATTERN: EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
65494 PATTERN: EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
65508 PATTERN: EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
65524 PATTERN: EVV 0xD9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
65538 PATTERN: EVV 0xD9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
65554 PATTERN: EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
65568 PATTERN: EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
65584 PATTERN: EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
65598 PATTERN: EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
65614 PATTERN: EVV 0xF9 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
65628 PATTERN: EVV 0xF9 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
65644 PATTERN: EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()
65658 PATTERN: EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
65674 PATTERN: EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
65688 PATTERN: EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
65704 PATTERN: EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()
65718 PATTERN: EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
65734 PATTERN: EVV 0x25 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
65748 PATTERN: EVV 0x25 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
65764 PATTERN: EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0
65778 PATTERN: EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING…
65794 PATTERN: EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0
65808 PATTERN: EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING…
65824 PATTERN: EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0
65838 PATTERN: EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING…
65854 PATTERN: EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0
65868 PATTERN: EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ES…
65884 PATTERN: EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0
65898 PATTERN: EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ES…
65914 PATTERN: EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0
65928 PATTERN: EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ES…
65944 PATTERN: EVV 0x27 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0
65958 PATTERN: EVV 0x27 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ES…
65974 PATTERN: EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0
65988 PATTERN: EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING…
66004 PATTERN: EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0
66018 PATTERN: EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING…
66034 PATTERN: EVV 0x26 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0
66048 PATTERN: EVV 0x26 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING…
66064 PATTERN: EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0
66078 PATTERN: EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ZEROING…
66094 PATTERN: EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0
66108 PATTERN: EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ZEROING…
66124 PATTERN: EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 ZEROING=0
66138 PATTERN: EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ZEROING…
66154 PATTERN: EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 ZEROING=0
66168 PATTERN: EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ZEROING=0 ES…
66184 PATTERN: EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 ZEROING=0
66198 PATTERN: EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ZEROING=0 ES…
66214 PATTERN: EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0
66228 PATTERN: EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ZEROING=0 ES…
66244 PATTERN: EVV 0x27 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0
66258 PATTERN: EVV 0x27 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ZEROING=0 ES…
66274 PATTERN: EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 ZEROING=0
66288 PATTERN: EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W1 ZEROING…
66304 PATTERN: EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 ZEROING=0
66318 PATTERN: EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W1 ZEROING…
66334 PATTERN: EVV 0x26 VF3 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 ZEROING=0
66348 PATTERN: EVV 0x26 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W1 ZEROING…
66364 PATTERN: EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
66378 PATTERN: EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
66394 PATTERN: EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
66408 PATTERN: EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
66424 PATTERN: EVV 0x68 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
66438 PATTERN: EVV 0x68 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
66454 PATTERN: EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
66468 PATTERN: EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
66484 PATTERN: EVV 0x6A V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
66498 PATTERN: EVV 0x6A V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
66514 PATTERN: EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
66528 PATTERN: EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
66544 PATTERN: EVV 0x6D V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
66558 PATTERN: EVV 0x6D V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
66574 PATTERN: EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
66588 PATTERN: EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
66604 PATTERN: EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
66618 PATTERN: EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
66634 PATTERN: EVV 0x69 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
66648 PATTERN: EVV 0x69 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
66664 PATTERN: EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
66678 PATTERN: EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_8_BIT…
66694 PATTERN: EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
66708 PATTERN: EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_8_BIT…
66724 PATTERN: EVV 0x60 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
66738 PATTERN: EVV 0x60 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_8_BIT…
66754 PATTERN: EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
66768 PATTERN: EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
66784 PATTERN: EVV 0x62 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
66798 PATTERN: EVV 0x62 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
66814 PATTERN: EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
66828 PATTERN: EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
66844 PATTERN: EVV 0x6C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
66858 PATTERN: EVV 0x6C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
66874 PATTERN: EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128
66888 PATTERN: EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 ESIZE_16_BI…
66904 PATTERN: EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256
66918 PATTERN: EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 ESIZE_16_BI…
66934 PATTERN: EVV 0x61 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512
66948 PATTERN: EVV 0x61 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 ESIZE_16_BI…
66964 PATTERN: EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
66978 PATTERN: EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
66994 PATTERN: EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
67008 PATTERN: EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
67024 PATTERN: EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
67038 PATTERN: EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
67054 PATTERN: EVV 0xEF V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
67068 PATTERN: EVV 0xEF V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
67084 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()
67098 PATTERN: EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE…
67114 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
67128 PATTERN: EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
67144 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 UIMM8()
67158 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
67172 PATTERN: EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 UIMM8() ESIZE…
67188 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()
67202 PATTERN: EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE…
67218 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
67232 PATTERN: EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
67248 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 UIMM8()
67262 PATTERN: EVV 0x50 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
67276 PATTERN: EVV 0x50 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 UIMM8() ESIZE…
67292 PATTERN: EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()
67306 PATTERN: EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1…
67320 PATTERN: EVV 0x51 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_…
67336 PATTERN: EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()
67350 PATTERN: EVV 0x51 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0…
67364 PATTERN: EVV 0x51 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_…
67380 PATTERN: EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
67394 PATTERN: EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_6…
67410 PATTERN: EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
67424 PATTERN: EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_6…
67440 PATTERN: EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
67454 PATTERN: EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_3…
67470 PATTERN: EVV 0x4C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
67484 PATTERN: EVV 0x4C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_3…
67500 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()
67514 PATTERN: EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() …
67530 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
67544 PATTERN: EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() …
67560 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR UIMM8()
67574 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1…
67588 PATTERN: EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR UIMM8() …
67604 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()
67618 PATTERN: EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() …
67634 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
67648 PATTERN: EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() …
67664 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR UIMM8()
67678 PATTERN: EVV 0x56 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0…
67692 PATTERN: EVV 0x56 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR UIMM8() …
67708 PATTERN: EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 UIMM8()
67722 PATTERN: EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1…
67736 PATTERN: EVV 0x57 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 UIMM8() ESIZE_…
67752 PATTERN: EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 UIMM8()
67766 PATTERN: EVV 0x57 V66 V0F3A MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0…
67780 PATTERN: EVV 0x57 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 UIMM8() ESIZE_…
67796 PATTERN: EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR UIMM8()
67810 PATTERN: EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR UIMM8() …
67826 PATTERN: EVV 0x09 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR UIMM8()
67840 PATTERN: EVV 0x09 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR UIMM8() …
67856 PATTERN: EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR UIMM8()
67870 PATTERN: EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR UIMM8() …
67886 PATTERN: EVV 0x08 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR UIMM8()
67900 PATTERN: EVV 0x08 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR UIMM8() …
67916 PATTERN: EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
67930 PATTERN: EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_6…
67946 PATTERN: EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
67960 PATTERN: EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_6…
67976 PATTERN: EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
67990 PATTERN: EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_3…
68006 PATTERN: EVV 0x4E V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
68020 PATTERN: EVV 0x4E V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_3…
68036 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
68050 PATTERN: EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
68066 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
68080 PATTERN: EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
68096 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
68110 PATTERN: EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS…
68126 PATTERN: EVV 0x2C V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
68140 PATTERN: EVV 0x2C V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS…
68156 PATTERN: EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
68172 PATTERN: EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
68188 PATTERN: EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
68204 PATTERN: EVV 0xA2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
68220 PATTERN: EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W1 RM=4 UISA_VMODRM_…
68236 PATTERN: EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W1 RM=4 UISA_VMODRM_…
68252 PATTERN: EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL128 W0 RM=4 UISA_VMODRM_…
68268 PATTERN: EVV 0xA3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 VL256 W0 RM=4 UISA_VMODRM_…
68284 PATTERN: EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
68298 PATTERN: EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
68314 PATTERN: EVV 0x23 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
68328 PATTERN: EVV 0x23 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
68344 PATTERN: EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
68358 PATTERN: EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE…
68374 PATTERN: EVV 0x43 V66 V0F3A MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
68388 PATTERN: EVV 0x43 V66 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE…
68404 PATTERN: EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 UIMM8()
68418 PATTERN: EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 UIMM8() ESIZE_6…
68434 PATTERN: EVV 0xC6 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 UIMM8()
68448 PATTERN: EVV 0xC6 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 UIMM8() ESIZE_6…
68464 PATTERN: EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 UIMM8()
68478 PATTERN: EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 UIMM8() ESIZE_3…
68494 PATTERN: EVV 0xC6 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 UIMM8()
68508 PATTERN: EVV 0xC6 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 UIMM8() ESIZE_3…
68524 PATTERN: EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1 NOEVSR
68538 PATTERN: EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 NOEVSR ESIZE_64_…
68554 PATTERN: EVV 0x51 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1 NOEVSR
68568 PATTERN: EVV 0x51 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 NOEVSR ESIZE_64_…
68584 PATTERN: EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0 NOEVSR
68598 PATTERN: EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 NOEVSR ESIZE_32_…
68614 PATTERN: EVV 0x51 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0 NOEVSR
68628 PATTERN: EVV 0x51 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 NOEVSR ESIZE_32_…
68644 PATTERN: EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
68658 PATTERN: EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
68674 PATTERN: EVV 0x5C V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
68688 PATTERN: EVV 0x5C V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
68704 PATTERN: EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
68718 PATTERN: EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
68734 PATTERN: EVV 0x5C VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
68748 PATTERN: EVV 0x5C VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
68764 PATTERN: EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
68778 PATTERN: EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
68794 PATTERN: EVV 0x15 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
68808 PATTERN: EVV 0x15 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
68824 PATTERN: EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
68838 PATTERN: EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
68854 PATTERN: EVV 0x15 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
68868 PATTERN: EVV 0x15 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
68884 PATTERN: EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
68898 PATTERN: EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
68914 PATTERN: EVV 0x14 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
68928 PATTERN: EVV 0x14 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
68944 PATTERN: EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
68958 PATTERN: EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
68974 PATTERN: EVV 0x14 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
68988 PATTERN: EVV 0x14 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
69004 PATTERN: EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
69018 PATTERN: EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS()…
69034 PATTERN: EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
69048 PATTERN: EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS()…
69064 PATTERN: EVV 0x57 V66 V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
69078 PATTERN: EVV 0x57 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS()…
69094 PATTERN: EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
69108 PATTERN: EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 ESIZE_32_BITS()…
69124 PATTERN: EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
69138 PATTERN: EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 ESIZE_32_BITS()…
69154 PATTERN: EVV 0x57 VNP V0F MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
69168 PATTERN: EVV 0x57 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 ESIZE_32_BITS()…
70049 PATTERN: EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
70063 PATTERN: EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
70079 PATTERN: EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
70093 PATTERN: EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
70109 PATTERN: EVV 0xB5 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
70123 PATTERN: EVV 0xB5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
70139 PATTERN: EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
70153 PATTERN: EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
70169 PATTERN: EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
70183 PATTERN: EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
70199 PATTERN: EVV 0xB4 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
70213 PATTERN: EVV 0xB4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…
70260 PATTERN: EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
70274 PATTERN: EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8…
70290 PATTERN: EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
70304 PATTERN: EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8…
70320 PATTERN: EVV 0x8D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
70334 PATTERN: EVV 0x8D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8…
70350 PATTERN: EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
70364 PATTERN: EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8…
70380 PATTERN: EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
70394 PATTERN: EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8…
70410 PATTERN: EVV 0x75 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
70424 PATTERN: EVV 0x75 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8…
70440 PATTERN: EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W0
70454 PATTERN: EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL128 W0 ESIZE_8…
70470 PATTERN: EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W0
70484 PATTERN: EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL256 W0 ESIZE_8…
70500 PATTERN: EVV 0x7D V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0
70514 PATTERN: EVV 0x7D V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() VL512 W0 ESIZE_8…
70530 PATTERN: EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL128 W1
70544 PATTERN: EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W1 ESIZE_64_BITS…
70560 PATTERN: EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL256 W1
70574 PATTERN: EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W1 ESIZE_64_BITS…
70590 PATTERN: EVV 0x83 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1
70604 PATTERN: EVV 0x83 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 ESIZE_64_BITS…