Lines Matching refs:SUPP
33 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
43 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
53 …G0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
63 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
73 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
83 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
93 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
103 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
113 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
123 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
126 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
137 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
141 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
154 …=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
166 …=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
170 …=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
183 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
193 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
203 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
213 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
223 …=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
233 OPERANDS : MEM0:w:mem32real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
243 …0:w:mem32real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
246 …:w:mem80real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
249 …MEM0:w:m64real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
259 …0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
263 …0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
267 …0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
280 …0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
293 OPERANDS : MEM0:r:mem14 REG0=XED_REG_X87STATUS:w:SUPP
295 OPERANDS : MEM0:r:mem28 REG0=XED_REG_X87STATUS:w:SUPP
305 OPERANDS : MEM0:r:mem16 REG0=XED_REG_X87CONTROL:w:SUPP REG1=XED_REG_X87STATUS:w:SUPP
315 OPERANDS : MEM0:w:mem14 REG0=XED_REG_X87STATUS:w:SUPP
317 OPERANDS : MEM0:w:mem28 REG0=XED_REG_X87STATUS:w:SUPP
327 OPERANDS : MEM0:w:mem16 REG0=XED_REG_X87CONTROL:r:SUPP REG1=XED_REG_X87STATUS:w:SUPP
337 …=XED_REG_ST0:w:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87PUSH:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
347 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():rw:f80 REG2=XED_REG_X87STATUS:w:SUPP
358 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():rw:f80 REG2=XED_REG_X87STATUS:w:SUPP
362 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():rw:f80 REG2=XED_REG_X87STATUS:w:SUPP
385 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
395 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
405 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
415 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
425 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
435 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
445 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
455 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
465 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
475 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
485 OPERANDS : REG0=XED_REG_ST0:w:SUPP:f80 REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
495 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
505 …ERANDS : REG0=XED_REG_ST0:r:SUPP:f80 REG1=XED_REG_ST1:rw:SUPP:f80 REG2=XED_REG_X87POP:r:SUPP REG3…
515 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_ST1:w:SUPP:f80 REG2=XED_REG_X87STATUS:w:SUPP
525 …ERANDS : REG0=XED_REG_ST0:r:SUPP:f80 REG1=XED_REG_ST1:rw:SUPP:f80 REG2=XED_REG_X87POP:r:SUPP REG3…
535 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_ST1:w:SUPP:f80 REG2=XED_REG_X87STATUS:w:SUPP
545 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_ST1:r:SUPP:f80 REG2=XED_REG_X87STATUS:w:SUPP
555 OPERANDS : REG0=XED_REG_X87STATUS:rw:SUPP
565 OPERANDS : REG0=XED_REG_X87STATUS:rw:SUPP
575 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_ST1:r:SUPP:f80 REG2=XED_REG_X87STATUS:w:SUPP
585 …ERANDS : REG0=XED_REG_ST0:r:SUPP:f80 REG1=XED_REG_ST1:rw:SUPP:f80 REG2=XED_REG_X87POP:r:SUPP REG3…
595 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
605 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_ST1:w:SUPP:f80 REG2=XED_REG_X87STATUS:w:SUPP
615 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
625 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_ST1:r:SUPP:f80 REG2=XED_REG_X87STATUS:w:SUPP
635 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
645 OPERANDS : REG0=XED_REG_ST0:rw:SUPP:f80 REG1=XED_REG_X87STATUS:w:SUPP
655 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
665 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
675 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
685 …EG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
695 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
705 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
715 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
725 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
736 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
747 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
758 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
769 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
779 …RANDS : REG0=XED_REG_ST0:r:SUPP:f80 REG1=XED_REG_ST1:r:SUPP:f80 REG2=XED_REG_X87POP2:rw:SUPP REG…
789 …0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
799 …M0:w:mem32int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
809 OPERANDS : MEM0:w:mem32int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
819 …EM0:w:mem32int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
829 …=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem80real REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
840 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
851 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
862 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
873 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
883 OPERANDS : REG0=XED_REG_X87STATUS:w:SUPP
893 OPERANDS : REG0=XED_REG_X87CONTROL:w:SUPP REG1=XED_REG_X87TAG:w:SUPP REG2=XED_REG_X87STATUS:w:SUPP
936 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
947 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
957 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
967 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
977 …REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
987 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
997 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
1007 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
1017 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
1027 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1037 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1047 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1057 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1067 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1077 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1087 …G0=XED_REG_ST0:w:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1097 … MEM0:w:m64int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1107 OPERANDS : MEM0:w:m64real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
1117 OPERANDS : MEM0:r:mem94 REG0=XED_REG_X87CONTROL:w:SUPP
1119 OPERANDS : MEM0:r:mem108 REG0=XED_REG_X87CONTROL:w:SUPP
1130 REG0=XED_REG_X87CONTROL:rw:SUPP \
1131 REG1=XED_REG_X87TAG:rw:SUPP \
1132 REG3=XED_REG_X87STATUS:rw:SUPP
1136 REG0=XED_REG_X87CONTROL:rw:SUPP \
1137 REG1=XED_REG_X87TAG:rw:SUPP \
1138 REG3=XED_REG_X87STATUS:rw:SUPP
1148 OPERANDS : MEM0:w:mem16 REG0=XED_REG_X87STATUS:rw:SUPP
1158 OPERANDS : REG0=X87():r:f80 REG1=XED_REG_X87TAG:w:SUPP
1168 OPERANDS : REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1178 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
1188 …=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:rw:SUPP
1198 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1208 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1218 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1228 …EG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1238 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1248 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1258 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1268 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1278 …0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1289 …0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1300 …ERANDS : REG0=XED_REG_ST0:r:SUPP:f80 REG1=XED_REG_ST1:r:SUPP:f80 REG2=XED_REG_X87POP2:r:SUPP REG3…
1310 …0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1322 …0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1333 …0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1345 …0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1356 …G0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1366 …EM0:w:mem16int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1376 OPERANDS : MEM0:w:mem16int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
1386 …EM0:w:mem16int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1396 …0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem80dec REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1406 …EG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:m64int REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1416 …M0:w:mem80dec REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1426 … MEM0:w:m64int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87STATUS:w:SUPP
1436 OPERANDS : REG0=X87():r:f80 REG1=XED_REG_X87TAG:w:SUPP REG2=XED_REG_X87POP:r:SUPP
1447 OPERANDS : REG0=XED_REG_AX:w:IMPL REG1=XED_REG_X87STATUS:rw:SUPP
1458 …=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
1469 …0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X87STATUS:w:SUPP
2625 OPERANDS : MEM0:w:v REG0=XED_REG_STACKPOP:r:spw:SUPP
2628 OPERANDS : REG0=GPRv_B():w REG1=XED_REG_STACKPOP:r:spw:SUPP
3471 OPERANDS : MEM0:r:b REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP
3473 OPERANDS : REG0=GPR8_B():r REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP
3484 OPERANDS : MEM0:r:b REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP
3487 OPERANDS : REG0=GPR8_B():r REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP
3498 OPERANDS : MEM0:r:b REG0=XED_REG_AX:rw:SUPP
3500 OPERANDS : REG0=GPR8_B():r REG1=XED_REG_AX:rw:SUPP
3511 OPERANDS : MEM0:r:b REG0=XED_REG_AX:rw:SUPP
3513 OPERANDS : REG0=GPR8_B():r REG1=XED_REG_AX:rw:SUPP
3609 OPERANDS : MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
3619 OPERANDS : REG0=GPRv_B():r REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
3629 OPERANDS : MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
3632 OPERANDS : REG0=GPRv_B():r REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
3642 OPERANDS : MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
3644 OPERANDS : REG0=GPRv_B():r REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
3654 OPERANDS : MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
3656 OPERANDS : REG0=GPRv_B():r REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
3809 OPERANDS : RELBR:r:z REG0=XED_REG_STACKPUSH:w:spw:SUPP REG1=rIP():rw:SUPP
3811 OPERANDS : RELBR:r:d REG0=XED_REG_STACKPUSH:w:spw:SUPP REG1=rIP():rw:SUPP
3814 OPERANDS : MEM0:r:v REG0=XED_REG_STACKPUSH:w:spw:SUPP REG1=rIP():rw:SUPP
3816 OPERANDS : REG0=GPRv_B():r REG1=XED_REG_STACKPUSH:w:spw:SUPP REG2=rIP():rw:SUPP
3826 OPERANDS : MEM0:r:v REG0=rIP():w:SUPP
3828 OPERANDS : REG0=GPRv_B():r REG1=rIP():w:SUPP
3840 OPERANDS : MEM0:r:p2 REG0=rIP():w:SUPP
3849 OPERANDS : MEM0:r:v REG0=XED_REG_STACKPUSH:w:spw:SUPP
3852 OPERANDS : REG0=GPRv_B():r REG1=XED_REG_STACKPUSH:w:spw:SUPP
3863 OPERANDS : MEM0:w:w REG0=XED_REG_LDTR:r:SUPP
3866 OPERANDS : REG0=GPRv_B():w REG1=XED_REG_LDTR:r:SUPP
3876 OPERANDS : MEM0:w:w REG0=XED_REG_TR:r:SUPP
3879 OPERANDS : REG0=GPRv_B():w REG1=XED_REG_TR:r:SUPP
3889 OPERANDS : MEM0:r:w REG0=XED_REG_LDTR:w:SUPP
3892 OPERANDS : REG0=GPR16_B():r REG1=XED_REG_LDTR:w:SUPP
3902 OPERANDS : MEM0:r:w REG0=XED_REG_TR:w:SUPP
3905 OPERANDS : REG0=GPR16_B():r REG1=XED_REG_TR:w:SUPP
3963 OPERANDS : MEM0:r:s64 REG0=XED_REG_GDTR:w:SUPP
3965 OPERANDS : MEM0:r:s REG0=XED_REG_GDTR:w:SUPP
3974 OPERANDS : MEM0:w:w REG0=XED_REG_CR0:r:SUPP
3983 OPERANDS : REG0=GPRv_B():w REG1=XED_REG_CR0:r:SUPP
3993 OPERANDS : MEM0:r:w REG0=XED_REG_CR0:w:SUPP
3995 OPERANDS : REG0=GPR16_B():r REG1=XED_REG_CR0:w:SUPP
4169 …S : MEM0:rcw:q REG0=XED_REG_EDX:rcw:SUPP REG1=XED_REG_EAX:rcw:SUPP REG2=XED_REG_ECX:r:SUPP REG3=X…
4171 …S : MEM0:rcw:q REG0=XED_REG_EDX:rcw:SUPP REG1=XED_REG_EAX:rcw:SUPP REG2=XED_REG_ECX:r:SUPP REG3=X…
4182 …S : MEM0:rcw:q REG0=XED_REG_EDX:rcw:SUPP REG1=XED_REG_EAX:rcw:SUPP REG2=XED_REG_ECX:r:SUPP REG3=X…
4184 …S : MEM0:rcw:q REG0=XED_REG_EDX:rcw:SUPP REG1=XED_REG_EAX:rcw:SUPP REG2=XED_REG_ECX:r:SUPP REG3=X…
4196 … : MEM0:rcw:dq REG0=XED_REG_RDX:rcw:SUPP REG1=XED_REG_RAX:rcw:SUPP REG2=XED_REG_RCX:r:SUPP REG3=X…
4207 … : MEM0:rcw:dq REG0=XED_REG_RDX:rcw:SUPP REG1=XED_REG_RAX:rcw:SUPP REG2=XED_REG_RCX:r:SUPP REG3=X…
4436 OPERANDS : MEM0:w:mfpxenv REG0=XED_REG_X87CONTROL:r:SUPP
4446 OPERANDS : MEM0:r:mfpxenv REG0=XED_REG_X87CONTROL:w:SUPP
4456 OPERANDS : MEM0:w:mfpxenv REG0=XED_REG_X87CONTROL:r:SUPP
4466 OPERANDS : MEM0:r:mfpxenv REG0=XED_REG_X87CONTROL:w:SUPP
4482 OPERANDS : MEM0:r:d REG0=XED_REG_MXCSR:w:SUPP
4493 OPERANDS : MEM0:w:d REG0=XED_REG_MXCSR:r:SUPP
4752 OPERANDS : MEM0:w:s64 REG0=XED_REG_GDTR:r:SUPP
4754 OPERANDS : MEM0:w:s REG0=XED_REG_GDTR:r:SUPP
4764 OPERANDS : MEM0:r:s64 REG0=XED_REG_IDTR:w:SUPP
4766 OPERANDS : MEM0:r:s REG0=XED_REG_IDTR:w:SUPP
4775 OPERANDS : REG0=XED_REG_EAX:r:SUPP REG1=XED_REG_ECX:r:SUPP REG2=XED_REG_EDX:r:SUPP
4784 OPERANDS : REG0=XED_REG_EAX:rw:SUPP REG1=XED_REG_ECX:r:SUPP
4794 OPERANDS : MEM0:w:s REG0=XED_REG_IDTR:r:SUPP
4803 OPERANDS : MEM0:w:s64 REG0=XED_REG_IDTR:r:SUPP
4830 …DS : REG0=XED_REG_EAX:w:SUPP REG1=XED_REG_EDX:w:SUPP REG2=XED_REG_ECX:w:SUPP REG3=XED_REG_TSC:r:S…
5066 OPERANDS : REG0=XED_REG_ES:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5076 OPERANDS : REG0=XED_REG_ES:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
5243 OPERANDS : REG0=XED_REG_CS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5409 OPERANDS : REG0=XED_REG_SS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5420 OPERANDS : REG0=XED_REG_SS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
5560 OPERANDS : REG0=XED_REG_DS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5570 OPERANDS : REG0=XED_REG_DS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
5714 OPERANDS : REG0=XED_REG_AL:rw:SUPP
5856 OPERANDS : REG0=XED_REG_AL:rw:SUPP
6000 OPERANDS : REG0=XED_REG_AL:rw:SUPP REG1=XED_REG_AH:rw:SUPP
6086 OPERANDS : REG0=XED_REG_AL:rw:SUPP REG1=XED_REG_AH:rw:SUPP
6117 OPERANDS : REG0=GPRv_SB():r REG1=XED_REG_STACKPUSH:w:spw:SUPP
6127 OPERANDS : REG0=GPRv_SB():w REG1=XED_REG_STACKPOP:r:spw:SUPP
6137 …SUPP REG1=XED_REG_AX:r:SUPP REG2=XED_REG_CX:r:SUPP REG3=XED_REG_DX:r:SUPP REG4=XED_REG_BX:r:SUPP R…
6146 …SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_ECX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_EBX:r:SU…
6155 …SUPP REG1=XED_REG_AX:w:SUPP REG2=XED_REG_CX:w:SUPP REG3=XED_REG_DX:w:SUPP REG4=XED_REG_BX:w:SUPP R…
6165 …SUPP REG1=XED_REG_EAX:w:SUPP REG2=XED_REG_ECX:w:SUPP REG3=XED_REG_EDX:w:SUPP REG4=XED_REG_EBX:w:SU…
6225 OPERANDS : IMM0:r:z REG0=XED_REG_STACKPUSH:w:spw:SUPP
6247 OPERANDS : IMM0:r:b:i8 REG0=XED_REG_STACKPUSH:w:spw:SUPP
6274 OPERANDS : MEM0:cw:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6276 OPERANDS : MEM0:cw:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6288 OPERANDS : MEM0:w:SUPP:b BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP
6302 OPERANDS : MEM0:cw:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6304 OPERANDS : MEM0:cw:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6316 OPERANDS : MEM0:w:SUPP:w BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP
6330 OPERANDS : MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6333 OPERANDS : MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6336 OPERANDS : MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6339 OPERANDS : MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP RE…
6351 OPERANDS : MEM0:w:SUPP:d BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP
6354 OPERANDS : MEM0:w:SUPP:d BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_DX:r:SUPP
6368 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:b BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6370 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:b BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6383 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:b BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
6397 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:w BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6399 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:w BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6411 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:w BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
6426 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6429 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6432 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6435 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP RE…
6447 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
6450 OPERANDS : REG0=XED_REG_DX:r:SUPP MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
6463 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6465 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6476 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6478 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6489 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6491 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6502 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6504 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6515 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6517 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6528 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6530 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6541 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6543 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6554 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6556 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6567 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6569 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6580 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6582 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6593 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6595 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6606 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6608 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6619 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6621 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6632 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6634 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6645 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6647 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6658 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6660 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
6934 OPERANDS : REG0=XED_REG_AX:w:SUPP REG1=XED_REG_AL:r:SUPP
6942 OPERANDS : REG0=XED_REG_RAX:w:SUPP REG1=XED_REG_EAX:r:SUPP
6951 OPERANDS : REG0=XED_REG_EAX:w:SUPP REG1=XED_REG_AX:r:SUPP
6960 OPERANDS : REG0=XED_REG_DX:w:SUPP REG1=XED_REG_AX:r:SUPP
6968 OPERANDS : REG0=XED_REG_RDX:w:SUPP REG1=XED_REG_RAX:r:SUPP
6977 OPERANDS : REG0=XED_REG_EDX:w:SUPP REG1=XED_REG_EAX:r:SUPP
6990 OPERANDS : MEM0:r:p2 REG0=XED_REG_STACKPUSH:w:spw2:SUPP REG1=rIP():w:SUPP
6992 OPERANDS : PTR:r:p IMM0:r:w REG0=XED_REG_STACKPUSH:w:spw2:SUPP REG1=rIP():w:SUPP
7011 OPERANDS : REG0=XED_REG_STACKPUSH:w:w:SUPP
7021 OPERANDS : REG0=XED_REG_STACKPUSH:w:d:SUPP
7030 OPERANDS : REG0=XED_REG_STACKPUSH:w:q:SUPP
7041 OPERANDS : REG0=XED_REG_STACKPOP:r:w:SUPP
7052 OPERANDS : REG0=XED_REG_STACKPOP:r:d:SUPP
7062 OPERANDS : REG0=XED_REG_STACKPOP:r:q:SUPP
7072 OPERANDS : REG0=XED_REG_AH:r:SUPP
7082 OPERANDS : REG0=XED_REG_AH:w:SUPP
7092 OPERANDS : REG0=XED_REG_AL:w:IMPL MEM0:r:b SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND …
7102 OPERANDS : REG0=OrAX():w:IMPL MEM0:r:v SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND INDE…
7112 OPERANDS : MEM0:w:b REG0=XED_REG_AL:r:IMPL SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND …
7122 OPERANDS : MEM0:w:v REG0=OrAX():r:IMPL SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND IND…
7137 …EM0:cw:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:b BASE1=ArSI():rcw:SUPP…
7140 …EM0:cw:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:b BASE1=ArSI():rcw:SUPP…
7152 OPERANDS : MEM0:w:SUPP:b BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:r:SUPP:b BASE1=ArSI()…
7168 …MEM0:cw:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:w BASE1=ArSI():rcw:SUPP…
7171 …MEM0:cw:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:w BASE1=ArSI():rcw:SUPP…
7183 OPERANDS : MEM0:w:SUPP:w BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:r:SUPP:w BASE1=ArSI():…
7199 …MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:d BASE1=ArSI():rcw:SUPP…
7202 …MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:d BASE1=ArSI():rcw:SUPP…
7214 OPERANDS : MEM0:w:SUPP:d BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:r:SUPP:d BASE1=ArSI():…
7228 …MEM0:cw:SUPP:q BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:q BASE1=ArSI():rcw:SUPP…
7231 …MEM0:cw:SUPP:q BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:cr:SUPP:q BASE1=ArSI():rcw:SUPP…
7243 OPERANDS : MEM0:w:SUPP:q BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP MEM1:r:SUPP:q BASE1=ArSI():…
7258 …MEM0:cr:SUPP:b BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:b BASE1=ArDI():rcw:SUPP…
7271 …MEM0:cr:SUPP:b BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:b BASE1=ArDI():rcw:SUPP…
7284 OPERANDS : MEM0:r:SUPP:b BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:b BASE1=ArDI():…
7299 …MEM0:cr:SUPP:w BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:w BASE1=ArDI():rcw:SUPP…
7312 …MEM0:cr:SUPP:w BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:w BASE1=ArDI():rcw:SUPP…
7324 OPERANDS : MEM0:r:SUPP:w BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:w BASE1=ArDI():…
7341 …MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:d BASE1=ArDI():rcw:SUPP…
7354 …MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:d BASE1=ArDI():rcw:SUPP…
7368 OPERANDS : MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:d BASE1=ArDI():…
7382 …MEM0:cr:SUPP:q BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:q BASE1=ArDI():rcw:SUPP…
7394 …MEM0:cr:SUPP:q BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:cr:SUPP:q BASE1=ArDI():rcw:SUPP…
7404 OPERANDS : MEM0:r:SUPP:q BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP MEM1:r:SUPP:q BASE1=ArDI():…
7440 OPERANDS : MEM0:cw:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_AL:r:SUPP RE…
7442 OPERANDS : MEM0:cw:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_AL:r:SUPP RE…
7453 OPERANDS : MEM0:w:SUPP:b BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_AL:r:SUPP
7468 OPERANDS : MEM0:cw:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_AX:r:SUPP RE…
7470 OPERANDS : MEM0:cw:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_AX:r:SUPP RE…
7481 OPERANDS : MEM0:w:SUPP:w BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_AX:r:SUPP
7497 OPERANDS : MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_EAX:r:SUPP R…
7499 OPERANDS : MEM0:cw:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_EAX:r:SUPP R…
7510 OPERANDS : MEM0:w:SUPP:d BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_EAX:r:SUPP
7525 OPERANDS : MEM0:cw:SUPP:q BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_RAX:r:SUPP R…
7527 OPERANDS : MEM0:cw:SUPP:q BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_RAX:r:SUPP R…
7537 OPERANDS : MEM0:w:SUPP:q BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP REG0=XED_REG_RAX:r:SUPP
7553 OPERANDS : REG0=XED_REG_AL:cw:SUPP MEM0:cr:SUPP:b BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP R…
7555 OPERANDS : REG0=XED_REG_AL:cw:SUPP MEM0:cr:SUPP:b BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP R…
7566 OPERANDS : REG0=XED_REG_AL:w:SUPP MEM0:r:SUPP:b BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
7582 OPERANDS : REG0=XED_REG_AX:cw:SUPP MEM0:cr:SUPP:w BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP R…
7584 OPERANDS : REG0=XED_REG_AX:cw:SUPP MEM0:cr:SUPP:w BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP R…
7595 OPERANDS : REG0=XED_REG_AX:w:SUPP MEM0:r:SUPP:w BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
7611 OPERANDS : REG0=XED_REG_EAX:cw:SUPP MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP …
7613 OPERANDS : REG0=XED_REG_EAX:cw:SUPP MEM0:cr:SUPP:d BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP …
7624 OPERANDS : REG0=XED_REG_EAX:w:SUPP MEM0:r:SUPP:d BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
7638 OPERANDS : REG0=XED_REG_RAX:cw:SUPP MEM0:cr:SUPP:q BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP …
7640 OPERANDS : REG0=XED_REG_RAX:cw:SUPP MEM0:cr:SUPP:q BASE0=ArSI():rcw:SUPP SEG0=FINAL_DSEG():r:SUPP …
7650 OPERANDS : REG0=XED_REG_RAX:w:SUPP MEM0:r:SUPP:q BASE0=ArSI():rw:SUPP SEG0=FINAL_DSEG():r:SUPP
7665 OPERANDS : REG0=XED_REG_AL:r:SUPP MEM0:cr:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP RE…
7677 OPERANDS : REG0=XED_REG_AL:r:SUPP MEM0:cr:SUPP:b BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP RE…
7689 OPERANDS : REG0=XED_REG_AL:r:SUPP MEM0:r:SUPP:b BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP
7705 OPERANDS : REG0=XED_REG_AX:r:SUPP MEM0:cr:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP RE…
7717 OPERANDS : REG0=XED_REG_AX:r:SUPP MEM0:cr:SUPP:w BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP RE…
7728 OPERANDS : REG0=XED_REG_AX:r:SUPP MEM0:r:SUPP:w BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP
7744 OPERANDS : REG0=XED_REG_EAX:r:SUPP MEM0:cr:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP R…
7756 OPERANDS : REG0=XED_REG_EAX:r:SUPP MEM0:cr:SUPP:d BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP R…
7767 OPERANDS : REG0=XED_REG_EAX:r:SUPP MEM0:r:SUPP:d BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP
7782 OPERANDS : REG0=XED_REG_RAX:r:SUPP MEM0:cr:SUPP:q BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP R…
7793 OPERANDS : REG0=XED_REG_RAX:r:SUPP MEM0:cr:SUPP:q BASE0=ArDI():rcw:SUPP SEG0=FINAL_ESEG():r:SUPP R…
7803 OPERANDS : REG0=XED_REG_RAX:r:SUPP MEM0:r:SUPP:q BASE0=ArDI():rw:SUPP SEG0=FINAL_ESEG():r:SUPP
7839 OPERANDS : IMM0:r:w REG0=XED_REG_STACKPOP:r:spw:SUPP REG1=rIP():w:SUPP
7850 OPERANDS : REG0=XED_REG_STACKPOP:r:spw:SUPP REG1=rIP():w:SUPP
7860 OPERANDS : REG0=GPRz_R():w MEM0:r:p REG1=XED_REG_ES:w:SUPP
7870 OPERANDS : REG0=GPRz_R():w MEM0:r:p REG1=XED_REG_DS:w:SUPP
7880 OPERANDS : IMM0:r:w IMM1:r:b REG0=XED_REG_STACKPUSH:w:spw:SUPP REG1=OrBP():rw:SUPP
7892 OPERANDS : MEM0:r:SUPP:v BASE0=ArBP():r:SUPP SEG0=FINAL_SSEG0():r:SUPP REG0=OrBP():rw:SUPP REG1=Or…
7905 OPERANDS : IMM0:r:w REG0=XED_REG_STACKPOP:r:spw2:SUPP REG1=rIP():w:SUPP
7917 OPERANDS : REG0=XED_REG_STACKPOP:r:spw2:SUPP REG1=rIP():w:SUPP
7928 OPERANDS : REG0=rIP():w:SUPP
7939 OPERANDS : IMM0:r:b REG0=rIP():w:SUPP
7950 OPERANDS : REG0=rIP():w:SUPP
7961 OPERANDS : REG0=XED_REG_STACKPOP:r:spw3:SUPP REG1=rIP():w:SUPP
7972 OPERANDS : REG0=XED_REG_STACKPOP:r:spw3:SUPP REG1=rIP():w:SUPP
7983 OPERANDS : REG0=XED_REG_STACKPOP:r:spw3:SUPP REG1=rIP():w:SUPP
7993 OPERANDS : IMM0:r:b:i8 REG0=XED_REG_AL:rw:SUPP REG1=XED_REG_AH:w:SUPP
8003 OPERANDS : IMM0:r:b:i8 REG0=XED_REG_AL:rw:SUPP REG1=XED_REG_AH:rw:SUPP
8013 OPERANDS : REG0=XED_REG_AL:w:SUPP
8024 OPERANDS : MEM0:r:SUPP:b BASE0=ArBX():r:SUPP INDEX=XED_REG_AL:r:SUPP REG0=XED_REG_AL:w:SUPP SEG0…
8036 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8038 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8040 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8044 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8054 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8056 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8058 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8062 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8074 OPERANDS : RELBR:r:b:i8 REG0=ArCX():rw:SUPP REG1=rIP():rw:SUPP
8085 OPERANDS : RELBR:r:b:i8 REG0=XED_REG_CX:r:SUPP REG1=rIP():rw:SUPP
8095 OPERANDS : RELBR:r:b:i8 REG0=XED_REG_ECX:r:SUPP REG1=rIP():rw:SUPP
8105 OPERANDS : RELBR:r:b:i8 REG0=XED_REG_RCX:r:SUPP REG1=rIP():rw:SUPP
8163 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
8165 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
8177 OPERANDS : PTR:r:p IMM0:r:w REG0=rIP():w:SUPP
8186 OPERANDS : RELBR:r:b:i8 REG0=rIP():rw:SUPP
8362 OPERANDS : REG0=rIP():w:SUPP
8384 OPERANDS : REG0=XED_REG_RIP:w:SUPP
8386 OPERANDS : REG0=XED_REG_EIP:w:SUPP
8678 OPERANDS : REG0=XED_REG_EAX:r:SUPP REG1=XED_REG_EDX:r:SUPP REG2=XED_REG_ECX:r:SUPP REG3=XED_REG_MS…
8687 OPERANDS : REG0=XED_REG_EAX:w:SUPP REG1=XED_REG_EDX:w:SUPP REG2=XED_REG_TSC:r:SUPP
8697 OPERANDS : REG0=XED_REG_EAX:w:SUPP REG1=XED_REG_EDX:w:SUPP REG2=XED_REG_ECX:r:SUPP REG3=XED_REG_MS…
8706 OPERANDS : REG0=XED_REG_EAX:w:SUPP REG1=XED_REG_EDX:w:SUPP REG2=XED_REG_ECX:r:SUPP REG3=XED_REG_MS…
8717 OPERANDS : REG0=rIP():w:SUPP
8728 OPERANDS : REG0=rIP():w:SUPP
9424 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9435 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9448 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9460 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9473 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9485 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9499 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9512 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9525 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9537 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9550 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9563 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9577 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9589 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9603 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
9615 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
9732 OPERANDS : REG0=XED_REG_FS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
9742 OPERANDS : REG0=XED_REG_FS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
9752 OPERANDS : REG0=XED_REG_EAX:rw:SUPP REG1=XED_REG_EBX:w:SUPP REG2=XED_REG_ECX:crw:SUPP REG3=XED_REG…
9777 OPERANDS : MEM0:rcw:b REG0=GPR8_R():r REG1=XED_REG_AL:rcw:SUPP
9788 OPERANDS : MEM0:rcw:b REG0=GPR8_R():r REG1=XED_REG_AL:rcw:SUPP
9799 OPERANDS : REG0=GPR8_B():rcw REG1=GPR8_R():r REG2=XED_REG_AL:rcw:SUPP
9814 OPERANDS : MEM0:rcw:v REG0=GPRv_R():r REG1=OrAX():rcw:SUPP
9825 OPERANDS : MEM0:rcw:v REG0=GPRv_R():r REG1=OrAX():rcw:SUPP
9835 OPERANDS : REG0=GPRv_B():rcw REG1=GPRv_R():r REG2=OrAX():rcw:SUPP
9848 OPERANDS : REG0=GPRv_R():w MEM0:r:p2 REG1=XED_REG_SS:w:SUPP
9892 OPERANDS : REG0=GPRv_R():w MEM0:r:p2 REG1=XED_REG_FS:w:SUPP
9902 OPERANDS : REG0=GPRv_R():w MEM0:r:p2 REG1=XED_REG_GS:w:SUPP
10741 … : REG0=MMX_R():r:q:u8 REG1=MMX_B():r:q:i8 MEM0:w:q:SUPP BASE0=ArDI():r:SUPP SEG0=FINAL_DSEG():r:S…
10860 …DS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq MEM0:w:dq:SUPP BASE0=ArDI():r:SUPP SEG0=FINAL_DSEG():r:S…
12122 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12134 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12147 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12159 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12173 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12185 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12198 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12210 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12223 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12235 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12249 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12261 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12275 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12287 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12301 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP
12313 OPERANDS : RELBR:r:d REG0=rIP():rw:SUPP
12428 OPERANDS : REG0=XED_REG_GS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
12438 OPERANDS : REG0=XED_REG_GS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
12449 OPERANDS : REG0=rIP():w:SUPP
13804 OPERANDS : REG0=XMM_R():rw:dq:f64 MEM0:r:dq:f64 REG1=XED_REG_XMM0:r:SUPP:dq:u64
13807 OPERANDS : REG0=XMM_R():rw:dq:f64 REG1=XMM_B():r:dq:f64 REG2=XED_REG_XMM0:r:SUPP:dq:u64
13818 OPERANDS : REG0=XMM_R():rw:dq:f32 MEM0:r:dq:f32 REG1=XED_REG_XMM0:r:SUPP:dq:u32
13821 OPERANDS : REG0=XMM_R():rw:dq:f32 REG1=XMM_B():r:dq:f32 REG2=XED_REG_XMM0:r:SUPP:dq:u32
13954 OPERANDS : REG0=XMM_R():rw:dq MEM0:r:dq REG1=XED_REG_XMM0:r:dq:SUPP
13957 OPERANDS : REG0=XMM_R():rw:dq REG1=XMM_B():r:dq REG2=XED_REG_XMM0:r:dq:SUPP
14437 … MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_ECX:w:…
14440 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_ECX:w:…
14443 … MEM0:r:dq IMM0:r:b REG1=XED_REG_RAX:r:SUPP REG2=XED_REG_RDX:r:SUPP REG3=XED_REG_RCX:w:…
14446 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_RAX:r:SUPP REG3=XED_REG_RDX:r:SUPP REG4=XED_REG_RCX:w:…
14459 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_ECX:w:SUPP
14462 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_ECX:w:SUPP
14465 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_RCX:w:SUPP
14468 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_RCX:w:SUPP
14482 … MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:d…
14485 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:d…
14488 … MEM0:r:dq IMM0:r:b REG1=XED_REG_RAX:r:SUPP REG2=XED_REG_RDX:r:SUPP REG3=XED_REG_XMM0:w:d…
14491 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_RAX:r:SUPP REG3=XED_REG_RDX:r:SUPP REG4=XED_REG_XMM0:w:d…
14504 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_XMM0:w:dq:SUPP
14507 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_XMM0:w:dq:SUPP
14516 OPERANDS : REG0=XED_REG_ECX:r:SUPP REG1=XED_REG_EDX:w:SUPP REG2=XED_REG_EAX:w:SUPP REG3=XED_REG_X…
14526 OPERANDS : REG0=XED_REG_ECX:r:SUPP REG1=XED_REG_EDX:r:SUPP REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_X…
14539 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
14550 OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
14563 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
14575 OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
14607 OPERANDS : REG0=XED_REG_EAX:rcw:SUPP REG1=XED_REG_EBX:r:SUPP
15384 OPERANDS : REG0=rIP():w:SUPP
15398 OPERANDS : REG0=XED_REG_EIP:w:SUPP
17482 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
17495 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
17942 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_B():r:dq:i32 REG2=XED_REG_XMM0:r:SUPP:dq:u8
17956 OPERANDS: REG0=XMM_R():rw:dq:i32 MEM0:r:dq:i32 REG1=XED_REG_XMM0:r:SUPP:dq:u8
18026 OPERANDS : REG0=GPRy_B():w REG1=XED_REG_FSBASE:r:SUPP:y
18036 OPERANDS : REG0=GPRy_B():w REG1=XED_REG_GSBASE:r:SUPP:y
18050 OPERANDS : REG0=GPRy_B():r REG1=XED_REG_FSBASE:w:SUPP:y
18061 OPERANDS : REG0=GPRy_B():r REG1=XED_REG_GSBASE:w:SUPP:y
18095 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
18107 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
18122 OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
18134 OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
18168 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
18181 OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP
22359 … MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_ECX:w:…
22361 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_ECX:w:…
22365 … MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_ECX:w:…
22367 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_ECX:w:…
22370 … MEM0:r:dq IMM0:r:b REG1=XED_REG_RAX:r:SUPP REG2=XED_REG_RDX:r:SUPP REG3=XED_REG_RCX:w:…
22372 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_RAX:r:SUPP REG3=XED_REG_RDX:r:SUPP REG4=XED_REG_RCX:w:…
22384 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_ECX:w:SUPP
22386 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_ECX:w:SUPP
22390 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_ECX:w:SUPP
22392 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_ECX:w:SUPP
22395 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_RCX:w:SUPP
22397 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_RCX:w:SUPP
22410 … MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:d…
22412 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:d…
22416 … MEM0:r:dq IMM0:r:b REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_EDX:r:SUPP REG3=XED_REG_XMM0:w:d…
22418 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_EAX:r:SUPP REG3=XED_REG_EDX:r:SUPP REG4=XED_REG_XMM0:w:d…
22421 … MEM0:r:dq IMM0:r:b REG1=XED_REG_RAX:r:SUPP REG2=XED_REG_RDX:r:SUPP REG3=XED_REG_XMM0:w:d…
22423 … REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_RAX:r:SUPP REG3=XED_REG_RDX:r:SUPP REG4=XED_REG_XMM0:w:d…
22434 OPERANDS : REG0=XMM_R():r:dq MEM0:r:dq IMM0:r:b REG1=XED_REG_XMM0:w:dq:SUPP
22436 OPERANDS : REG0=XMM_R():r:dq REG1=XMM_B():r:dq IMM0:r:b REG2=XED_REG_XMM0:w:dq:SUPP
22451 …REG0=XMM_R():r:dq:u8 REG1=XMM_B():r:dq:u8 MEM0:w:SUPP:dq:u8 BASE0=ArDI():r:SUPP SEG0=FINAL_DSEG():…
22463 OPERANDS : MEM0:r:d REG0=XED_REG_MXCSR:w:SUPP
22473 OPERANDS : MEM0:w:d REG0=XED_REG_MXCSR:r:SUPP
25351 OPERANDS : REG0=VGPR32_R():w:d REG1=VGPR32_N():w:d REG2=VGPR32_B():r:d REG3=XED_REG_EDX:r:SUPP
25354 OPERANDS : REG0=VGPR32_R():w:d REG1=VGPR32_N():w:d REG2=VGPR32_B():r:d REG3=XED_REG_EDX:r:SUPP
25356 OPERANDS : REG0=VGPR32_R():w:d REG1=VGPR32_N():w:d MEM0:r:d REG2=XED_REG_EDX:r:SUPP
25359 OPERANDS : REG0=VGPR32_R():w:d REG1=VGPR32_N():w:d MEM0:r:d REG2=XED_REG_EDX:r:SUPP
25363 OPERANDS : REG0=VGPR64_R():w:q REG1=VGPR64_N():w:q REG2=VGPR64_B():r:q REG3=XED_REG_RDX:r:SUPP
25365 OPERANDS : REG0=VGPR64_R():w:q REG1=VGPR64_N():w:q MEM0:r:q REG2=XED_REG_RDX:r:SUPP
25621 OPERANDS : RELBR:r:z REG0=rIP():rw:SUPP REG1=XED_REG_EAX:cw:SUPP
25641 OPERANDS : REG0=XED_REG_EAX:rcw:SUPP IMM0:r:b
27103 OPERANDS: REG0=XED_REG_EAX:r:SUPP \
27104 REG1=XED_REG_RBX:crw:SUPP \
27105 REG2=XED_REG_RCX:crw:SUPP \
27106 REG3=XED_REG_RDX:crw:SUPP
27118 OPERANDS: REG0=XED_REG_EAX:r:SUPP \
27119 REG1=XED_REG_RBX:crw:SUPP \
27120 REG2=XED_REG_RCX:crw:SUPP \
27121 REG3=XED_REG_RDX:crw:SUPP
27157 OPERANDS: REG0=XED_REG_EDX:w:SUPP REG1=XED_REG_EAX:w:SUPP REG2=XED_REG_ECX:r:SUPP
27169 OPERANDS: REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_ECX:r:SUPP