Lines Matching refs:PIN_INPUT_PULLDOWN

165 			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a9.gpio1_25 */
166 			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a10.gpio1_26 */
167 			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a11.gpio1_27 */
173 			0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_sclk.gpio0_2 */
174 			0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* spi0_d0.gpio0_3 */
244 			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
250 			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
251 			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
252 			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
253 			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
254 			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
261 			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
262 			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
263 			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
264 			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
265 			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
266 			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
267 			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
268 			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
269 			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
270 			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
271 			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
272 			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
287 			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
288 			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
352 			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
353 			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
355 			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
362 			0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */