Lines Matching refs:clks
47 clocks = <&clks IMX6QDL_CLK_ARM>,
48 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
49 <&clks IMX6QDL_CLK_STEP>,
50 <&clks IMX6QDL_CLK_PLL1_SW>,
51 <&clks IMX6QDL_CLK_PLL1_SYS>;
85 clocks = <&clks IMX6QDL_CLK_OCRAM>;
96 clocks = <&clks IMX6Q_CLK_ECSPI5>,
97 <&clks IMX6Q_CLK_ECSPI5>;
114 clocks = <&clks IMX6QDL_CLK_SATA>,
115 <&clks IMX6QDL_CLK_SATA_REF_100M>,
116 <&clks IMX6QDL_CLK_AHB>;
125 clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>,
126 <&clks IMX6QDL_CLK_GPU2D_CORE>;
138 clocks = <&clks IMX6QDL_CLK_IPU2>,
139 <&clks IMX6QDL_CLK_IPU2_DI0>,
140 <&clks IMX6QDL_CLK_IPU2_DI1>;
233 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
234 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
235 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
236 <&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI1>;