Lines Matching refs:clocks
76 clocks {
159 clocks = <&clks IMX7ULP_CLK_DMA1>, <&clks IMX7ULP_CLK_DMA_MUX1>;
193 clocks = <&clks IMX7ULP_CLK_SNVS>;
201 clocks = <&clks IMX7ULP_CLK_LPTPM5>;
208 /* clocks = <&lpclk>;*/
209 clocks = <&clks IMX7ULP_CLK_LPIT1>;
211 assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
219 clocks = <&clks IMX7ULP_CLK_LPI2C4>;
221 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
231 clocks = <&clks IMX7ULP_CLK_LPI2C5>;
233 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C5>;
243 clocks = <&clks IMX7ULP_CLK_LPSPI2>;
245 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI2>;
255 clocks = <&clks IMX7ULP_CLK_LPSPI3>;
257 assigned-clocks = <&clks IMX7ULP_CLK_LPSPI3>;
267 clocks = <&clks IMX7ULP_CLK_LPUART4>;
269 assigned-clocks = <&clks IMX7ULP_CLK_LPUART4>;
279 clocks = <&clks IMX7ULP_CLK_LPUART5>;
281 assigned-clocks = <&clks IMX7ULP_CLK_LPUART5>;
294 clocks = <&clks IMX7ULP_CLK_USB0>;
315 clocks = <&clks IMX7ULP_CLK_USB_PHY>;
323 clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
337 clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
351 clocks = <&clks IMX7ULP_CLK_WDG1>;
352 assigned-clocks = <&clks IMX7ULP_CLK_WDG1>;
353 assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
366 clocks = <&clks IMX7ULP_CLK_WDG2>;
367 assigned-clocks = <&clks IMX7ULP_CLK_WDG2>;
368 assigned-clocks-parents = <&clks IMX7ULP_CLK_FIRC>;
375 clocks = <&ckil>, <&osc>, <&sirc>,
380 assigned-clocks = <&clks IMX7ULP_CLK_LPTPM5>,
414 clocks = <&clks IMX7ULP_CLK_LPI2C6>;
416 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C6>;
426 clocks = <&clks IMX7ULP_CLK_LPI2C7>;
428 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C7>;
438 clocks = <&clks IMX7ULP_CLK_LPUART6>;
440 assigned-clocks = <&clks IMX7ULP_CLK_LPUART6>;
452 clocks = <&clks IMX7ULP_CLK_LPUART7>;
454 assigned-clocks = <&clks IMX7ULP_CLK_LPUART7>;
466 clocks = <&clks IMX7ULP_CLK_DUMMY>,
477 clocks = <&clks IMX7ULP_CLK_DSI>;
567 clocks = <&clks IMX7ULP_CLK_DUMMY>,
582 clocks = <&clks IMX7ULP_CLK_GPU3D>,