268 	reg = readl(&mxc_ccm->cbcdr);  in get_periph_clk()
294 	reg = readl(&mxc_ccm->cbcdr);  in get_ipg_clk()
314 	podf = readl(&mxc_ccm->cbcdr);  in get_ipg_per_clk()
420 	u32 cbcdr = readl(&mxc_ccm->cbcdr);  in get_axi_a_clk()  local
421 	u32 pdf = MXC_CCM_CBCDR_AXI_A_PODF_RD(cbcdr);  in get_axi_a_clk()
428 	u32 cbcdr = readl(&mxc_ccm->cbcdr);  in get_axi_b_clk()  local
429 	u32 pdf = MXC_CCM_CBCDR_AXI_B_PODF_RD(cbcdr);  in get_axi_b_clk()
436 	u32 cbcdr = readl(&mxc_ccm->cbcdr);  in get_emi_slow_clk()  local
437 	u32 emi_clk_sel = cbcdr & MXC_CCM_CBCDR_EMI_CLK_SEL;  in get_emi_slow_clk()
438 	u32 pdf = MXC_CCM_CBCDR_EMI_PODF_RD(cbcdr);  in get_emi_slow_clk()
452 	u32 cbcdr = readl(&mxc_ccm->cbcdr);  in get_ddr_clk()  local
453 	if (cbcdr & MXC_CCM_CBCDR_DDR_HIFREQ_SEL) {  in get_ddr_clk()
454 		u32 ddr_clk_podf = MXC_CCM_CBCDR_DDR_PODF_RD(cbcdr);  in get_ddr_clk()
734 	clrsetbits_le32(&mxc_ccm->cbcdr,  in config_nfc_clk()
771 	if (readl(&mxc_ccm->cbcdr) & MXC_CCM_CBCDR_PERIPH_CLK_SEL) {  in config_periph_clk()
833 	clrsetbits_le32(&mxc_ccm->cbcdr, 0x7 << shift, (div - 1) << shift);  in config_ddr_clk()