Lines Matching refs:clkrst
464 struct clk_rst_ctlr *clkrst = in clock_get_osc_freq() local
468 reg = readl(&clkrst->crc_osc_ctrl); in clock_get_osc_freq()
480 struct clk_rst_ctlr *clkrst = in get_periph_source_reg() local
486 return &clkrst->crc_clk_src[PERIPH_ID_CSI+1]; in get_periph_source_reg()
493 return &clkrst->crc_clk_src_vw[internal_id]; in get_periph_source_reg()
495 return &clkrst->crc_clk_src[internal_id]; in get_periph_source_reg()
576 struct clk_rst_ctlr *clkrst = in clock_set_enable() local
584 clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)]; in clock_set_enable()
586 clk = &clkrst->crc_clk_out_enb_vw[PERIPH_REG(periph_id)]; in clock_set_enable()
597 struct clk_rst_ctlr *clkrst = in reset_set_enable() local
605 reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)]; in reset_set_enable()
607 reset = &clkrst->crc_rst_dev_vw[PERIPH_REG(periph_id)]; in reset_set_enable()
656 struct clk_rst_ctlr *clkrst = in clock_early_init() local
665 clrbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, PLLC_IDDQ); in clock_early_init()
698 writel(0x00561600, &clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_out[1]); in clock_early_init()
702 setbits_le32(&clkrst->crc_pll[CLOCK_ID_CGENERAL].pll_misc, (1 << pllinfo->lock_ena)); in clock_early_init()
709 writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); in clock_early_init()