Lines Matching refs:clkrst
46 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clocks() local
54 reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in enable_cpu_clocks()
63 writel(CCLK_BURST_POLICY, &clkrst->crc_cclk_brst_pol); in enable_cpu_clocks()
64 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clocks()
70 writel(reg, &clkrst->crc_clk_cpu_cmplx_clr); in enable_cpu_clocks()
83 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in remove_cpu_resets() local
90 writel(reg, &clkrst->crc_rst_cpulp_cmplx_clr); in remove_cpu_resets()
91 writel(reg, &clkrst->crc_rst_cpug_cmplx_clr); in remove_cpu_resets()
96 writel(reg, &clkrst->crc_rst_cpulp_cmplx_clr); in remove_cpu_resets()
104 writel(reg, &clkrst->crc_rst_cpug_cmplx_clr); in remove_cpu_resets()
115 struct clk_rst_ctlr *clkrst = in tegra124_init_clocks() local
125 val = readl(&clkrst->crc_osc_ctrl); in tegra124_init_clocks()
128 writel(val, &clkrst->crc_osc_ctrl); in tegra124_init_clocks()
143 writel(val, &clkrst->crc_clk_sys_rate); in tegra124_init_clocks()