28 	struct clk_rst_ctlr *clkrst =  in wb_start()  local
55 	reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_U]);  in wb_start()
57 	writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_U]);  in wb_start()
61 	osc_ctrl.word = readl(&clkrst->crc_osc_ctrl);  in wb_start()
64 	writel(osc_ctrl.word, &clkrst->crc_osc_ctrl);  in wb_start()
83 	reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_L]);  in wb_start()
85 	writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_L]);  in wb_start()
90 	writel(reg, &clkrst->crc_cpu_cmplx_set);  in wb_start()
103 	writel(CCLK_PLLP_BURST_POLICY, &clkrst->crc_cclk_brst_pol);  in wb_start()
108 	writel(reg, &clkrst->crc_clk_cpu_cmplx);  in wb_start()
111 	reg = readl(&clkrst->crc_clk_out_enb[TEGRA_DEV_L]);  in wb_start()
113 	writel(reg, &clkrst->crc_clk_out_enb[TEGRA_DEV_L]);  in wb_start()
127 	reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_U]);  in wb_start()
129 	writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_U]);  in wb_start()
187 	writel(pllx_misc.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_misc);  in wb_start()
188 	writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base);  in wb_start()
191 	writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base);  in wb_start()
193 	writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base);  in wb_start()
198 	writel(reg, &clkrst->crc_cpu_cmplx_clr);  in wb_start()
202 	writel(reg, &clkrst->crc_pll[CLOCK_ID_MEMORY].pll_out[0]);  in wb_start()
207 	writel(reg, &clkrst->crc_sclk_brst_pol);  in wb_start()
210 	reg = readl(&clkrst->crc_rst_dev[TEGRA_DEV_L]);  in wb_start()
212 	writel(reg, &clkrst->crc_rst_dev[TEGRA_DEV_L]);  in wb_start()
225 	writel(SWR_TRIG_SYS_RST, &clkrst->crc_rst_dev[TEGRA_DEV_L]);  in wb_start()