83 static int umc_dramcont_init(void __iomem *dc_base, void __iomem *ca_base,  in umc_dramcont_init()  argument
119 	       dc_base + UMC_CMDCTLA);  in umc_dramcont_init()
121 	       dc_base + UMC_CMDCTLB);  in umc_dramcont_init()
122 	writel(umc_spcctla[freq_e][size_e], dc_base + UMC_SPCCTLA);  in umc_dramcont_init()
123 	writel(umc_spcctlb[freq_e], dc_base + UMC_SPCCTLB);  in umc_dramcont_init()
124 	writel(umc_rdatactl[freq_e], dc_base + UMC_RDATACTL_D0);  in umc_dramcont_init()
125 	writel(0x04060806, dc_base + UMC_WDATACTL_D0);  in umc_dramcont_init()
126 	writel(0x04a02000, dc_base + UMC_DATASET);  in umc_dramcont_init()
128 	writel(0x00400020, dc_base + UMC_DCCGCTL);  in umc_dramcont_init()
129 	writel(0x00000003, dc_base + 0x7000);  in umc_dramcont_init()
130 	writel(0x0000004f, dc_base + 0x8000);  in umc_dramcont_init()
131 	writel(0x000000c3, dc_base + 0x8004);  in umc_dramcont_init()
132 	writel(0x00000077, dc_base + 0x8008);  in umc_dramcont_init()
133 	writel(0x0000003b, dc_base + UMC_DICGCTLA);  in umc_dramcont_init()
134 	writel(0x020a0808, dc_base + UMC_DICGCTLB);  in umc_dramcont_init()
135 	writel(0x00000004, dc_base + UMC_FLOWCTLG);  in umc_dramcont_init()
137 	writel(0x0801e01e, dc_base + UMC_FLOWCTLA);  in umc_dramcont_init()
138 	writel(0x00200000, dc_base + UMC_FLOWCTLB);  in umc_dramcont_init()
139 	writel(0x00004444, dc_base + UMC_FLOWCTLC);  in umc_dramcont_init()
140 	writel(0x200a0a00, dc_base + UMC_SPCSETB);  in umc_dramcont_init()
141 	writel(0x00000000, dc_base + UMC_SPCSETD);  in umc_dramcont_init()
142 	writel(0x00000520, dc_base + UMC_DFICUPDCTLA);  in umc_dramcont_init()
147 static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,  in umc_ch_init()  argument
150 	void __iomem *phy_base = dc_base + 0x00001000;  in umc_ch_init()
153 	writel(UMC_INITSET_INIT1EN, dc_base + UMC_INITSET);  in umc_ch_init()
154 	while (readl(dc_base + UMC_INITSTAT) & UMC_INITSTAT_INIT1ST)  in umc_ch_init()
157 	writel(0x00000101, dc_base + UMC_DIOCTLA);  in umc_ch_init()
168 	return umc_dramcont_init(dc_base, ca_base, freq, size, ddr3plus);  in umc_ch_init()
175 	void __iomem *dc_base = umc_base + 0x00400000;  in uniphier_sld8_umc_init()  local
180 		ret = umc_ch_init(dc_base, ca_base, bd->dram_freq,  in uniphier_sld8_umc_init()
189 		dc_base += 0x00200000;  in uniphier_sld8_umc_init()