Lines Matching refs:r6
50 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
52 swi r6, r0, 0x28 /* used first unused MB vector */
65 addik r6, r0, CONFIG_SYS_RESET_ADDRESS
66 sw r6, r1, r0
71 sh r6, r0, r8
79 addik r6, r0, _exception_handler
80 sw r6, r1, r0
105 sh r6, r0, r8
112 addik r6, r0, _interrupt_handler
113 sw r6, r1, r0
118 sh r6, r0, r8
124 addik r6, r0, _hw_exception_handler
125 sw r6, r1, r0
130 sh r6, r0, r8
135 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
149 cmp r6, r5, r4
150 beqi r6, 3f
154 cmp r6, r5, r4 /* check if we have reach the end */
155 bnei r6, 2b
165 addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET
166 swi r6, r31, GD_MALLOC_BASE
172 addi r6, r0, CONFIG_SPL_STACK_ADDR
173 swi r6, r31, GD_MALLOC_BASE
209 out16: bslli r3, r6, 8
210 bsrli r6, r6, 8
212 or r3, r3, r6
232 addi r31, r6, 0 /* Start to use new GD */
239 rsub r6, r21, r22
243 cmp r12, r5, r6 /* Check if we have reach the end */
252 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
254 swi r6, r0, 0x28 /* used first unused MB vector */
259 addik r6, r0, _exception_handler
260 addk r6, r6, r23 /* add offset */
261 sw r6, r1, r0
266 sh r6, r0, r8
268 addik r6, r0, _hw_exception_handler
269 addk r6, r6, r23 /* add offset */
270 sw r6, r1, r0
275 sh r6, r0, r8
277 addik r6, r0, _interrupt_handler
278 addk r6, r6, r23 /* add offset */
279 sw r6, r1, r0
284 sh r6, r0, r8
311 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
316 addi r6, r0, CONFIG_SYS_TEXT_BASE