Lines Matching refs:ACFG_2XHCLK_LGTH
395 #define ACFG_2XHCLK_LGTH (2000/CONFIG_HCLK_FREQ) /* ns */ macro
424 #if (((2*ACFG_SDRAM_CLOCK_CYCLE_CL_1) > (3*ACFG_2XHCLK_LGTH)) || \
430 ((2*ACFG_SDRAM_CLOCK_CYCLE_CL_1+ACFG_2XHCLK_LGTH-1)/ \
431 ACFG_2XHCLK_LGTH)
435 #if ((2*ACFG_SDRAM_RC_DELAY) > (16*ACFG_2XHCLK_LGTH))
439 ((2*ACFG_SDRAM_RC_DELAY+ACFG_2XHCLK_LGTH-1)/ \
440 ACFG_2XHCLK_LGTH)
456 | (((((2*ACFG_SDRAM_EXIT_PWD+ACFG_2XHCLK_LGTH-1)/ \
457 ACFG_2XHCLK_LGTH)-1)&0x3)<<21)\
460 ACFG_2XHCLK_LGTH-1)/ACFG_2XHCLK_LGTH)-1)&0x3)<<18) \
463 | (((((2*ACFG_SDRAM_RAS_DELAY+ACFG_2XHCLK_LGTH-1)/ \
464 ACFG_2XHCLK_LGTH)-1)&0x7)<<12) \
465 | (((((2*ACFG_SDRAM_RRD_DELAY+ACFG_2XHCLK_LGTH-1)/ \
466 ACFG_2XHCLK_LGTH)-1)&0x3)<<10) \
468 | (((((2*ACFG_SDRAM_RCD_DELAY+ACFG_2XHCLK_LGTH-1)/ \
469 ACFG_2XHCLK_LGTH)-1)&0x7)<<4) \