Lines Matching refs:setbits_be32
610 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
612 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
645 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
659 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
671 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
682 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
686 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
717 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
733 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
795 setbits_be32(&gur->rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK); in config_serdes1_refclks()
882 setbits_be32(&srds_regs->bank[i].rstctl, in config_serdes1_refclks()
884 setbits_be32(&srds_regs->bank[i].rstctl, in config_serdes1_refclks()
925 setbits_be32(&gur->rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK); in config_serdes2_refclks()
966 setbits_be32(&srds2_regs->bank[i].rstctl, in config_serdes2_refclks()
968 setbits_be32(&srds2_regs->bank[i].rstctl, in config_serdes2_refclks()