22 	struct ccsr_ddr __iomem *ddr =  in sdram_init()  local
25 	__raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);  in sdram_init()
26 	__raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);  in sdram_init()
28 	__raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds);  in sdram_init()
29 	__raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config);  in sdram_init()
31 	__raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3);  in sdram_init()
32 	__raw_writel(CONFIG_SYS_DDR_TIMING_0_800, &ddr->timing_cfg_0);  in sdram_init()
33 	__raw_writel(CONFIG_SYS_DDR_TIMING_1_800, &ddr->timing_cfg_1);  in sdram_init()
34 	__raw_writel(CONFIG_SYS_DDR_TIMING_2_800, &ddr->timing_cfg_2);  in sdram_init()
36 	__raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2);  in sdram_init()
37 	__raw_writel(CONFIG_SYS_DDR_MODE_1_800, &ddr->sdram_mode);  in sdram_init()
38 	__raw_writel(CONFIG_SYS_DDR_MODE_2_800, &ddr->sdram_mode_2);  in sdram_init()
40 	__raw_writel(CONFIG_SYS_DDR_INTERVAL_800, &ddr->sdram_interval);  in sdram_init()
41 	__raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init);  in sdram_init()
42 	__raw_writel(CONFIG_SYS_DDR_CLK_CTRL_800, &ddr->sdram_clk_cntl);  in sdram_init()
44 	__raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, &ddr->ddr_wrlvl_cntl);  in sdram_init()
45 	__raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4);  in sdram_init()
46 	__raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5);  in sdram_init()
47 	__raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);  in sdram_init()
50 	__raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg);  in sdram_init()
56 	out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN);  in sdram_init()