16 				dimm_params_t *pdimm,  in fsl_ddr_board_options()  argument
32 		if (pdimm[slot].n_ranks)  in fsl_ddr_board_options()
54 		if (pbsp->n_ranks == pdimm[slot].n_ranks &&  in fsl_ddr_board_options()
55 		    (pdimm[slot].rank_density >> 30) >= pbsp->rank_gb) {  in fsl_ddr_board_options()
100 		dq_mapping_0 = pdimm[slot].dq_mapping[0];  in fsl_ddr_board_options()
101 		dq_mapping_2 = pdimm[slot].dq_mapping[2];  in fsl_ddr_board_options()
102 		dq_mapping_3 = pdimm[slot].dq_mapping[3];  in fsl_ddr_board_options()
103 		pdimm[slot].dq_mapping[0] = pdimm[slot].dq_mapping[8];  in fsl_ddr_board_options()
104 		pdimm[slot].dq_mapping[1] = pdimm[slot].dq_mapping[9];  in fsl_ddr_board_options()
105 		pdimm[slot].dq_mapping[2] = pdimm[slot].dq_mapping[6];  in fsl_ddr_board_options()
106 		pdimm[slot].dq_mapping[3] = pdimm[slot].dq_mapping[7];  in fsl_ddr_board_options()
107 		pdimm[slot].dq_mapping[6] = dq_mapping_2;  in fsl_ddr_board_options()
108 		pdimm[slot].dq_mapping[7] = dq_mapping_3;  in fsl_ddr_board_options()
109 		pdimm[slot].dq_mapping[8] = dq_mapping_0;  in fsl_ddr_board_options()
110 		pdimm[slot].dq_mapping[9] = 0;  in fsl_ddr_board_options()
111 		pdimm[slot].dq_mapping[10] = 0;  in fsl_ddr_board_options()
112 		pdimm[slot].dq_mapping[11] = 0;  in fsl_ddr_board_options()
113 		pdimm[slot].dq_mapping[12] = 0;  in fsl_ddr_board_options()
114 		pdimm[slot].dq_mapping[13] = 0;  in fsl_ddr_board_options()
115 		pdimm[slot].dq_mapping[14] = 0;  in fsl_ddr_board_options()
116 		pdimm[slot].dq_mapping[15] = 0;  in fsl_ddr_board_options()
117 		pdimm[slot].dq_mapping[16] = 0;  in fsl_ddr_board_options()
118 		pdimm[slot].dq_mapping[17] = 0;  in fsl_ddr_board_options()
138 		if (pdimm[0].n_ranks == 2 && pdimm[1].n_ranks == 2) {  in fsl_ddr_board_options()