43 	volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;  in fixed_sdram()  local
47 	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE  & 0xfffff000;  in fixed_sdram()
48 	im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);  in fixed_sdram()
49 	im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;  in fixed_sdram()
57 	im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;  in fixed_sdram()
58 	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;  in fixed_sdram()
61 	im->ddr.cs_config[1] = 0;  in fixed_sdram()
63 	im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;  in fixed_sdram()
64 	im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;  in fixed_sdram()
65 	im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;  in fixed_sdram()
66 	im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;  in fixed_sdram()
67 	im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;  in fixed_sdram()
69 	if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)  in fixed_sdram()
70 		im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG | SDRAM_CFG_BI;  in fixed_sdram()
72 		im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;  in fixed_sdram()
74 	im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;  in fixed_sdram()
75 	im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;  in fixed_sdram()
76 	im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;  in fixed_sdram()
78 	im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;  in fixed_sdram()
82 	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;  in fixed_sdram()
96 	volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;  in dram_init()  local
99 	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)  in dram_init()
105 	if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)  in dram_init()