11 void fsl_ddr_board_options(memctl_options_t *popts,  in fsl_ddr_board_options()  argument
26 	popts->clk_adjust = 4;  in fsl_ddr_board_options()
33 	popts->cpo_override = 0xff;  in fsl_ddr_board_options()
46 	popts->write_data_delay = 2;  in fsl_ddr_board_options()
51 	popts->half_strength_driver_enable = 1;  in fsl_ddr_board_options()
54 	popts->wrlvl_en = 1;  in fsl_ddr_board_options()
55 	popts->wrlvl_override = 1;  in fsl_ddr_board_options()
56 	popts->wrlvl_sample = 0xa;  in fsl_ddr_board_options()
57 	popts->wrlvl_start = 0x4;  in fsl_ddr_board_options()
60 	popts->rtt_override = 1;  in fsl_ddr_board_options()
61 	popts->rtt_override_value = DDR3_RTT_60_OHM;  in fsl_ddr_board_options()
62 	popts->rtt_wr_override_value = 0; /* Rtt_WR= dynamic ODT off */  in fsl_ddr_board_options()