Lines Matching refs:NEW_PAD_CTRL
57 NEW_PAD_CTRL(MX51_PAD_UART1_RTS__UART1_RTS, UART_PAD_CTRL), in setup_iomux_uart()
58 NEW_PAD_CTRL(MX51_PAD_UART1_CTS__UART1_CTS, UART_PAD_CTRL), in setup_iomux_uart()
67 NEW_PAD_CTRL(MX51_PAD_EIM_EB2__FEC_MDIO, PAD_CTL_HYS | in setup_iomux_fec()
71 NEW_PAD_CTRL(MX51_PAD_EIM_CS3__FEC_RDATA3, MX51_PAD_CTRL_2), in setup_iomux_fec()
72 NEW_PAD_CTRL(MX51_PAD_EIM_CS2__FEC_RDATA2, MX51_PAD_CTRL_2), in setup_iomux_fec()
73 NEW_PAD_CTRL(MX51_PAD_EIM_EB3__FEC_RDATA1, MX51_PAD_CTRL_2), in setup_iomux_fec()
82 NEW_PAD_CTRL(MX51_PAD_NANDF_RB2__FEC_COL, MX51_PAD_CTRL_4), in setup_iomux_fec()
83 NEW_PAD_CTRL(MX51_PAD_NANDF_RB3__FEC_RX_CLK, MX51_PAD_CTRL_4), in setup_iomux_fec()
86 NEW_PAD_CTRL(MX51_PAD_NANDF_D11__FEC_RX_DV, MX51_PAD_CTRL_4), in setup_iomux_fec()
96 NEW_PAD_CTRL(MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, PAD_CTL_HYS | in setup_iomux_spi()
98 NEW_PAD_CTRL(MX51_PAD_CSPI1_MISO__ECSPI1_MISO, PAD_CTL_HYS | in setup_iomux_spi()
100 NEW_PAD_CTRL(MX51_PAD_CSPI1_SS1__ECSPI1_SS1, in setup_iomux_spi()
103 NEW_PAD_CTRL(MX51_PAD_CSPI1_RDY__ECSPI1_RDY, MX51_PAD_CTRL_2), in setup_iomux_spi()
104 NEW_PAD_CTRL(MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, PAD_CTL_HYS | in setup_iomux_spi()
134 NEW_PAD_CTRL(MX51_PAD_GPIO1_7__GPIO1_7, 0), /* H1 hub reset */ in setup_usb_h1()
145 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_USBH1_STP__GPIO1_27, in board_ehci_hcd_init()
256 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_EIM_A20__GPIO2_14, in power_init()
271 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_0__GPIO1_0, in board_mmc_getcd()
274 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6, in board_mmc_getcd()
289 NEW_PAD_CTRL(MX51_PAD_SD1_CMD__SD1_CMD, PAD_CTL_DSE_MAX | in board_mmc_init()
291 NEW_PAD_CTRL(MX51_PAD_SD1_CLK__SD1_CLK, PAD_CTL_DSE_MAX | in board_mmc_init()
293 NEW_PAD_CTRL(MX51_PAD_SD1_DATA0__SD1_DATA0, PAD_CTL_DSE_MAX | in board_mmc_init()
295 NEW_PAD_CTRL(MX51_PAD_SD1_DATA1__SD1_DATA1, PAD_CTL_DSE_MAX | in board_mmc_init()
297 NEW_PAD_CTRL(MX51_PAD_SD1_DATA2__SD1_DATA2, PAD_CTL_DSE_MAX | in board_mmc_init()
299 NEW_PAD_CTRL(MX51_PAD_SD1_DATA3__SD1_DATA3, PAD_CTL_DSE_MAX | in board_mmc_init()
301 NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_HYS), in board_mmc_init()
302 NEW_PAD_CTRL(MX51_PAD_GPIO1_1__SD1_WP, PAD_CTL_HYS), in board_mmc_init()
306 NEW_PAD_CTRL(MX51_PAD_SD2_CMD__SD2_CMD, in board_mmc_init()
308 NEW_PAD_CTRL(MX51_PAD_SD2_CLK__SD2_CLK, in board_mmc_init()
310 NEW_PAD_CTRL(MX51_PAD_SD2_DATA0__SD2_DATA0, in board_mmc_init()
312 NEW_PAD_CTRL(MX51_PAD_SD2_DATA1__SD2_DATA1, in board_mmc_init()
314 NEW_PAD_CTRL(MX51_PAD_SD2_DATA2__SD2_DATA2, in board_mmc_init()
316 NEW_PAD_CTRL(MX51_PAD_SD2_DATA3__SD2_DATA3, in board_mmc_init()
318 NEW_PAD_CTRL(MX51_PAD_GPIO1_6__GPIO1_6, PAD_CTL_HYS), in board_mmc_init()
319 NEW_PAD_CTRL(MX51_PAD_GPIO1_5__GPIO1_5, PAD_CTL_HYS), in board_mmc_init()