59 void fsl_ddr_board_options(memctl_options_t *popts,  in fsl_ddr_board_options()  argument
84 				popts->clk_adjust = pbsp->clk_adjust;  in fsl_ddr_board_options()
85 				popts->wrlvl_start = pbsp->wrlvl_start;  in fsl_ddr_board_options()
86 				popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
87 				popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
100 		popts->clk_adjust = pbsp_highest->clk_adjust;  in fsl_ddr_board_options()
101 		popts->wrlvl_start = pbsp_highest->wrlvl_start;  in fsl_ddr_board_options()
102 		popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;  in fsl_ddr_board_options()
103 		popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;  in fsl_ddr_board_options()
118 	popts->half_strength_driver_enable = 1;  in fsl_ddr_board_options()
122 	popts->wrlvl_override = 1;  in fsl_ddr_board_options()
123 	popts->wrlvl_sample = 0xf;  in fsl_ddr_board_options()
128 	popts->rtt_override = 0;  in fsl_ddr_board_options()
131 	popts->zq_en = 1;  in fsl_ddr_board_options()
135 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);  in fsl_ddr_board_options()
136 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |  in fsl_ddr_board_options()
139 	popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
140 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);  in fsl_ddr_board_options()
143 	popts->cpo_sample = 0x5f;  in fsl_ddr_board_options()
150 		popts->data_bus_width = DDR_DATA_BUS_WIDTH_32;  in fsl_ddr_board_options()
154 	popts->data_bus_width = DDR_DATA_BUS_WIDTH_32;  in fsl_ddr_board_options()