Lines Matching refs:GPIO_PAD_CONF
20 GPIO_PAD_CONF("N37: CX_PRDY_B", NATIVE, M1, NA, NA, NA,
23 GPIO_PAD_CONF("N35: CX_PRDY_B_2", NATIVE, M1, NA, NA, NA,
26 GPIO_PAD_CONF("N39: CX_PREQ_B", NATIVE, M1, NA, NA, NA,
29 GPIO_PAD_CONF("N48: GP_CAMERASB00", GPIO, M1, GPO, LOW,
32 GPIO_PAD_CONF("N53: GP_CAMERASB01", GPIO, M1, GPO, LOW,
35 GPIO_PAD_CONF("N46: GP_CAMERASB02", GPIO, M1, GPO, LOW,
38 GPIO_PAD_CONF("N51: GP_CAMERASB03", GPIO, M1, GPO, LOW,
41 GPIO_PAD_CONF("N56: GP_CAMERASB04", GPIO, M1, GPO, LOW,
44 GPIO_PAD_CONF("N45: GP_CAMERASB05", GPIO, M1, GPO, LOW,
47 GPIO_PAD_CONF("N49: GP_CAMERASB06", GPIO, M1, GPO, LOW,
50 GPIO_PAD_CONF("N54: GP_CAMERASB07", GPIO, M1, GPO, LOW,
53 GPIO_PAD_CONF("N47: GP_CAMERASB08", GPIO, M1, GPO, LOW,
56 GPIO_PAD_CONF("N52: GP_CAMERASB09", GPIO, M1, GPO, LOW,
59 GPIO_PAD_CONF("N50: GP_CAMERASB10", GPIO, M1, GPO, LOW,
62 GPIO_PAD_CONF("N55: GP_CAMERASB11", GPIO, M1, GPO, LOW,
65 GPIO_PAD_CONF("N00: GPIO_DFX0", NATIVE, M5, NA, NA, NA,
68 GPIO_PAD_CONF("N03: GPIO_DFX1", NATIVE, M5, NA, NA, NA,
71 GPIO_PAD_CONF("N07: GPIO_DFX2", NATIVE, M5, NA, NA, NA,
74 GPIO_PAD_CONF("N01: GPIO_DFX3", NATIVE, M5, NA, NA, NA,
77 GPIO_PAD_CONF("N05: GPIO_DFX4", GPIO, M1, GPO, HIGH, NA,
80 GPIO_PAD_CONF("N04: GPIO_DFX5", GPIO, M1, GPO, HIGH, NA,
83 GPIO_PAD_CONF("N08: GPIO_DFX6", NATIVE, M8, NA, NA, NA,
86 GPIO_PAD_CONF("N02: GPIO_DFX7", GPIO, M1, GPO, LOW, NA,
89 GPIO_PAD_CONF("N15: GPIO_SUS0", GPIO, M1, GPI, NA, NA,
92 GPIO_PAD_CONF("N19: GPIO_SUS1", GPIO, M1, GPI, NA, NA,
95 GPIO_PAD_CONF("N24: GPIO_SUS2", GPIO, M1, GPI, NA, NA,
98 GPIO_PAD_CONF("N17: GPIO_SUS3", NATIVE, M6, NA, NA, NA,
101 GPIO_PAD_CONF("N22: GPIO_SUS4", GPIO, M1, GPO, HIGH, NA,
104 GPIO_PAD_CONF("N20: GPIO_SUS5", GPIO, M1, GPO, HIGH, NA,
107 GPIO_PAD_CONF("N25: GPIO_SUS6", GPIO, M1, GPI, NA, NA,
111 GPIO_PAD_CONF("N18: GPIO_SUS7", GPIO, M1, GPI, NA, NA,
114 GPIO_PAD_CONF("N71: HV_DDI0_DDC_SCL", NATIVE, M1, NA, NA, NA,
117 GPIO_PAD_CONF("N66: HV_DDI0_DDC_SDA", NATIVE, M1, NA, NA, NA,
120 GPIO_PAD_CONF("N61: HV_DDI0_HPD", NATIVE, M1, NA, NA, NA,
123 GPIO_PAD_CONF("N64: HV_DDI1_HPD", NATIVE, M1, NA, NA, NA,
126 GPIO_PAD_CONF("N67: HV_DDI2_DDC_SCL", NATIVE, M3, NA, NA, NA,
129 GPIO_PAD_CONF("N62: HV_DDI2_DDC_SDA", NATIVE, M3, NA, NA, NA,
132 GPIO_PAD_CONF("N68: HV_DDI2_HPD", NATIVE, M1, NA, NA, NA,
135 GPIO_PAD_CONF("N65: PANEL0_BKLTCTL", GPIO, M1, GPI, NA, NA,
138 GPIO_PAD_CONF("N60: PANEL0_BKLTEN", GPIO, M1, GPI, NA, NA,
141 GPIO_PAD_CONF("N72: PANEL0_VDDEN", GPIO, M1, GPI, NA, NA,
144 GPIO_PAD_CONF("N63: PANEL1_BKLTCTL", NATIVE, M1, NA, NA, NA,
147 GPIO_PAD_CONF("N70: PANEL1_BKLTEN", NATIVE, M1, NA, NA, NA,
150 GPIO_PAD_CONF("N69: PANEL1_VDDEN", NATIVE, M1, NA, NA, NA,
153 GPIO_PAD_CONF("N32: PROCHOT_B", NATIVE, M1, NA, NA, NA,
156 GPIO_PAD_CONF("N16: SEC_GPIO_SUS10", GPIO, M1, GPI, NA, NA,
159 GPIO_PAD_CONF("N21: SEC_GPIO_SUS11", GPIO, M1, GPI, NA, NA,
162 GPIO_PAD_CONF("N23: SEC_GPIO_SUS8", GPIO, M1, GPI, NA, NA,
165 GPIO_PAD_CONF("N27: SEC_GPIO_SUS9", GPIO, M1, GPI, LOW, NA,
169 GPIO_PAD_CONF("N31: TCK", NATIVE, M1, NA, NA, NA,
172 GPIO_PAD_CONF("N41: TDI", NATIVE, M1, NA, NA, NA,
175 GPIO_PAD_CONF("N39: TDO", NATIVE, M1, NA, NA, NA,
178 GPIO_PAD_CONF("N36: TDO_2", NATIVE, M1, NA, NA, NA,
181 GPIO_PAD_CONF("N34: TMS", NATIVE, M1, NA, NA, NA,
184 GPIO_PAD_CONF("N30: TRST_B", NATIVE, M1, NA, NA, NA,
188 GPIO_PAD_CONF("E21: MF_ISH_GPIO_0", GPIO, M1, GPI, NA, NA,
191 GPIO_PAD_CONF("E18: MF_ISH_GPIO_1", GPIO, M1, GPI, NA, NA,
194 GPIO_PAD_CONF("E24: MF_ISH_GPIO_2", GPIO, M1, GPI, NA, NA,
197 GPIO_PAD_CONF("E15: MF_ISH_GPIO_3", GPIO, M1, GPI, NA, NA,
200 GPIO_PAD_CONF("E22: MF_ISH_GPIO_4", GPIO, M1, GPI, NA, NA,
203 GPIO_PAD_CONF("E19: MF_ISH_GPIO_5", GPIO, M1, GPO, HIGH, NA,
206 GPIO_PAD_CONF("E25: MF_ISH_GPIO_6", NATIVE, M1, NA, NA, NA,
209 GPIO_PAD_CONF("E16: MF_ISH_GPIO_7", GPIO, M1, GPO, HIGH, NA,
212 GPIO_PAD_CONF("E23: MF_ISH_GPIO_8", NATIVE, M1, NA, NA, NA,
215 GPIO_PAD_CONF("E20: MF_ISH_GPIO_9", NATIVE, M1, NA, NA, NA,
218 GPIO_PAD_CONF("E26: MF_ISH_I2C1_SDA", NATIVE, M1, NA, NA, NA,
221 GPIO_PAD_CONF("E17: MF_ISH_I2C1_SCL", NATIVE, M1, NA, NA, NA,
224 GPIO_PAD_CONF("E04: PMU_AC_PRESENT", NATIVE, M1, NA, NA, NA,
227 GPIO_PAD_CONF("E01: PMU_BATLOW_B", NATIVE, M1, NA, NA, NA,
230 GPIO_PAD_CONF("E05: PMU_PLTRST_B", NATIVE, M1, NA, NA, NA,
233 GPIO_PAD_CONF("E07: PMU_SLP_LAN_B", NATIVE, M1, NA, NA, NA,
236 GPIO_PAD_CONF("E03: PMU_SLP_S0IX_B", NATIVE, M1, NA, NA, NA,
239 GPIO_PAD_CONF("E00: PMU_SLP_S3_B", NATIVE, M1, NA, NA, NA,
242 GPIO_PAD_CONF("E09: PMU_SLP_S4_B", NATIVE, M1, NA, NA, NA,
245 GPIO_PAD_CONF("E06: PMU_SUSCLK", NATIVE, M1, NA, NA, NA,
248 GPIO_PAD_CONF("E10: PMU_WAKE_B", NATIVE, M1, NA, NA, NA,
251 GPIO_PAD_CONF("E11: PMU_WAKE_LAN_B", NATIVE, M1, NA, NA, NA,
254 GPIO_PAD_CONF("E02: SUS_STAT_B", NATIVE, M1, NA, NA, NA,
258 GPIO_PAD_CONF("SE16: SDMMC1_CLK", NATIVE, M1, NA, NA, HIGH,
261 GPIO_PAD_CONF("SE23: SDMMC1_CMD", NATIVE, M1, NA, NA, HIGH,
264 GPIO_PAD_CONF("SE17: SDMMC1_D0", NATIVE, M1, NA, NA, HIGH,
267 GPIO_PAD_CONF("SE24: SDMMC1_D1", NATIVE, M1, NA, NA, HIGH,
270 GPIO_PAD_CONF("SE20: SDMMC1_D2", NATIVE, M1, NA, NA, HIGH,
273 GPIO_PAD_CONF("SE26: SDMMC1_D3_CD_B", NATIVE, M1, NA, NA, HIGH,
276 GPIO_PAD_CONF("SE67: MMC1_D4_SD_WE", NATIVE, M1, NA, NA, HIGH,
279 GPIO_PAD_CONF("SE65: MMC1_D5", NATIVE, M1, NA, NA, HIGH,
282 GPIO_PAD_CONF("SE63: MMC1_D6", NATIVE, M1, NA, NA, HIGH,
285 GPIO_PAD_CONF("SE68: MMC1_D7", NATIVE, M1, NA, NA, HIGH,
288 GPIO_PAD_CONF("SE69: MMC1_RCLK", NATIVE, M1, NA, NA, NA,
291 GPIO_PAD_CONF("SE77: GPIO_ALERT", GPIO, M1, GPI, NA, NA,
295 GPIO_PAD_CONF("SE79: ILB_SERIRQ", NATIVE, M1, NA, NA, NA,
298 GPIO_PAD_CONF("SE51: MF_LPC_CLKOUT0", NATIVE, M1, NA, NA, NA,
301 GPIO_PAD_CONF("SE49: MF_LPC_CLKOUT1", NATIVE, M1, NA, NA, NA,
304 GPIO_PAD_CONF("SE47: MF_LPC_AD0", NATIVE, M1, NA, NA, NA,
307 GPIO_PAD_CONF("SE52: MF_LPC_AD1", NATIVE, M1, NA, NA, NA,
310 GPIO_PAD_CONF("SE45: MF_LPC_AD2", NATIVE, M1, NA, NA, NA,
313 GPIO_PAD_CONF("SE50: MF_LPC_AD3", NATIVE, M1, NA, NA, NA,
316 GPIO_PAD_CONF("SE46: LPC_CLKRUNB", NATIVE, M1, NA, NA, NA,
319 GPIO_PAD_CONF("SE48: LPC_FRAMEB", NATIVE, M1, NA, NA, NA,
322 GPIO_PAD_CONF("SE00: MF_PLT_CLK0", NATIVE, M1, NA, NA, NA,
325 GPIO_PAD_CONF("SE02: MF_PLT_CLK1", NATIVE, M1, NA, NA, NA,
328 GPIO_PAD_CONF("SE07: MF_PLT_CLK2", GPIO, M1, GPI, NA, NA,
331 GPIO_PAD_CONF("SE04: MF_PLT_CLK3", GPIO, M1, GPI, NA, NA,
334 GPIO_PAD_CONF("SE03: MF_PLT_CLK4", GPIO, M1, GPO, LOW, NA,
337 GPIO_PAD_CONF("SE06: MF_PLT_CLK5", GPIO, M3, GPO, LOW, NA,
340 GPIO_PAD_CONF("SE83: SUSPWRDNACK", NATIVE, M1, NA, NA, NA,
343 GPIO_PAD_CONF("SE05: PWM0", GPIO, M1, GPO, LOW, NA,
346 GPIO_PAD_CONF("SE01: PWM1", GPIO, M1, GPO, HIGH, NA,
349 GPIO_PAD_CONF("SE85: SDMMC3_1P8_EN", NATIVE, M1, NA, NA, NA,
352 GPIO_PAD_CONF("SE81: SDMMC3_CD_B", NATIVE, M1, NA, NA, NA,
355 GPIO_PAD_CONF("SE31: SDMMC3_CLK", NATIVE, M1, NA, NA, NA,
358 GPIO_PAD_CONF("SE34: SDMMC3_CMD", NATIVE, M1, NA, NA, NA,
361 GPIO_PAD_CONF("SE35: SDMMC3_D0", NATIVE, M1, NA, NA, NA,
364 GPIO_PAD_CONF("SE30: SDMMC3_D1", NATIVE, M1, NA, NA, NA,
367 GPIO_PAD_CONF("SE33: SDMMC3_D2", NATIVE, M1, NA, NA, NA,
370 GPIO_PAD_CONF("SE32: SDMMC3_D3", NATIVE, M1, NA, NA, NA,
373 GPIO_PAD_CONF("SE78: SDMMC3_PWR_EN_B", NATIVE, M1, NA, NA, NA,
376 GPIO_PAD_CONF("SE19: SDMMC2_CLK", NATIVE, M1, NA, NA, NA,
379 GPIO_PAD_CONF("SE22: SDMMC2_CMD", NATIVE, M1, NA, NA, NA,
382 GPIO_PAD_CONF("SE25: SDMMC2_D0", NATIVE, M1, NA, NA, NA,
385 GPIO_PAD_CONF("SE18: SDMMC2_D1", NATIVE, M1, NA, NA, NA,
388 GPIO_PAD_CONF("SE21: SDMMC2_D2", NATIVE, M1, NA, NA, NA,
391 GPIO_PAD_CONF("SE15: SDMMC2_D3_CD_B", NATIVE, M1, NA, NA, NA,
394 GPIO_PAD_CONF("SE62: SPI1_CLK", NATIVE, M1, NA, NA, NA,
397 GPIO_PAD_CONF("SE61: SPI1_CS0_B", NATIVE, M1, NA, NA, NA,
400 GPIO_PAD_CONF("SE66: SPI1_CS1_B", NATIVE, M1, NA, NA, NA,
403 GPIO_PAD_CONF("SE60: SPI1_MISO", NATIVE, M1, NA, NA, NA,
406 GPIO_PAD_CONF("SE64: SPI1_MOSI", NATIVE, M1, NA, NA, NA,
409 GPIO_PAD_CONF("SE80: USB_OC0_B", NATIVE, M1, NA, NA, NA,
412 GPIO_PAD_CONF("SE75: USB_OC1_B", NATIVE, M1, NA, NA, NA,
415 GPIO_PAD_CONF("SW02: FST_SPI_CLK", NATIVE, M1, NA, NA, NA,
418 GPIO_PAD_CONF("SW06: FST_SPI_CS0_B", NATIVE, M1, NA, NA, NA,
421 GPIO_PAD_CONF("SW04: FST_SPI_CS1_B", GPIO, M1, GPO, HIGH, NA,
424 GPIO_PAD_CONF("SW07: FST_SPI_CS2_B", GPIO, M1, GPO, LOW, NA,
427 GPIO_PAD_CONF("SW01: FST_SPI_D0", NATIVE, M1, NA, NA, NA,
430 GPIO_PAD_CONF("SW05: FST_SPI_D1", NATIVE, M1, NA, NA, NA,
433 GPIO_PAD_CONF("SW00: FST_SPI_D2", NATIVE, M1, NA, NA, NA,
436 GPIO_PAD_CONF("SW03: FST_SPI_D3", NATIVE, M1, NA, NA, NA,
439 GPIO_PAD_CONF("SW30: MF_HDA_CLK", NATIVE, M2, NA, NA, NA,
442 GPIO_PAD_CONF("SW37: MF_HDA_DOCKENB", NATIVE, M1, NA, NA, NA,
445 GPIO_PAD_CONF("SW34: MF_HDA_DOCKRSTB", NATIVE, M1, NA, NA, NA,
448 GPIO_PAD_CONF("SW31: MF_HDA_RSTB", NATIVE, M2, NA, NA, NA,
451 GPIO_PAD_CONF("SW32: MF_HDA_SDI0", NATIVE, M2, NA, NA, NA,
454 GPIO_PAD_CONF("SW36: MF_HDA_SDI1", NATIVE, M2, NA, NA, NA,
457 GPIO_PAD_CONF("SW33: MF_HDA_SDO", NATIVE, M2, NA, NA, NA,
460 GPIO_PAD_CONF("SW35: MF_HDA_SYNC", NATIVE, M2, NA, NA, NA,
463 GPIO_PAD_CONF("SW18: UART1_CTS_B", NATIVE, M1, NA, NA, NA,
466 GPIO_PAD_CONF("SW15: UART1_RTS_B", NATIVE, M1, NA, NA, NA,
469 GPIO_PAD_CONF("SW16: UART1_RXD", NATIVE, M1, NA, NA, NA,
472 GPIO_PAD_CONF("SW20: UART1_TXD", NATIVE, M1, NA, NA, NA,
475 GPIO_PAD_CONF("SW22: UART2_CTS_B", NATIVE, M1, NA, NA, NA,
478 GPIO_PAD_CONF("SW19: UART2_RTS_B", NATIVE, M1, NA, NA, NA,
481 GPIO_PAD_CONF("SW17: UART2_RXD", NATIVE, M1, NA, NA, NA,
484 GPIO_PAD_CONF("SW21: UART2_TXD", NATIVE, M1, NA, NA, NA,
487 GPIO_PAD_CONF("SW50: I2C4_SCL", NATIVE, M3, NA, NA, NA,
490 GPIO_PAD_CONF("SW46: I2C4_SDA", NATIVE, M3, NA, NA, NA,
493 GPIO_PAD_CONF("SW49: I2C_NFC_SDA", NATIVE, M1, NA, NA, NA,
496 GPIO_PAD_CONF("SW52: I2C_NFC_SCL", NATIVE, M1, NA, NA, NA,
499 GPIO_PAD_CONF("SW77: GP_SSP_2_CLK", NATIVE, M1, NA, NA, NA,
502 GPIO_PAD_CONF("SW81: GP_SSP_2_FS", NATIVE, M1, NA, NA, NA,
505 GPIO_PAD_CONF("SW79: GP_SSP_2_RXD", NATIVE, M1, NA, NA, NA,
508 GPIO_PAD_CONF("SW82: GP_SSP_2_TXD", NATIVE, M1, NA, NA, NA,
511 GPIO_PAD_CONF("SW90: PCIE_CLKREQ0B", NATIVE, M1, NA, NA, NA,
514 GPIO_PAD_CONF("SW91: PCIE_CLKREQ1B", NATIVE, M1, NA, NA, NA,
517 GPIO_PAD_CONF("SW93: PCIE_CLKREQ2B", NATIVE, M1, NA, NA, NA,
520 GPIO_PAD_CONF("SW95: PCIE_CLKREQ3B", NATIVE, M2, NA, NA, NA,
523 GPIO_PAD_CONF("SW75: SATA_GP0", GPIO, M1, GPO, HIGH, NA,
526 GPIO_PAD_CONF("SW76: SATA_GP1", GPIO, M1, GPI, HIGH, NA,
529 GPIO_PAD_CONF("SW78: SATA_GP2", NATIVE, M1, NA, NA, NA,
532 GPIO_PAD_CONF("SW80: SATA_GP3", GPIO, M2, GPI, LOW, NA,
535 GPIO_PAD_CONF("SW77: SATA_LEDN", NATIVE, M1, NA, NA, NA,
538 GPIO_PAD_CONF("SW79: MF_SMB_ALERTB", NATIVE, M1, NA, NA,
541 GPIO_PAD_CONF("SW81: MF_SMB_CLK", NATIVE, M1, NA, NA, NA,
544 GPIO_PAD_CONF("SW82: MF_SMB_DATA", NATIVE, M1, NA, NA, NA,
547 GPIO_PAD_CONF("SW90: PCIE_CLKREQ0B", NATIVE, M1, NA, NA, NA,
550 GPIO_PAD_CONF("SW91: PCIE_CLKREQ1B", NATIVE, M1, NA, NA, NA,
553 GPIO_PAD_CONF("SW93: PCIE_CLKREQ2B", NATIVE, M1, NA, NA, NA,
556 GPIO_PAD_CONF("SW95: PCIE_CLKREQ3B", NATIVE, M2, NA, NA, NA,
559 GPIO_PAD_CONF("SW75: SATA_GP0", GPIO, M1, GPO, HIGH, NA, NA,
562 GPIO_PAD_CONF("SW76: SATA_GP1", GPIO, M1, GPI, HIGH, NA, NA,
565 GPIO_PAD_CONF("SW78: SATA_GP2", NATIVE, M1, NA, NA, NA,
568 GPIO_PAD_CONF("SW80: SATA_GP3", GPIO, M2, GPI, LOW, NA,
571 GPIO_PAD_CONF("SW77: SATA_LEDN", NATIVE, M1, NA, NA, NA,
574 GPIO_PAD_CONF("SW79: MF_SMB_ALERTB", NATIVE, M1, NA, NA,
577 GPIO_PAD_CONF("SW81: MF_SMB_CLK", NATIVE, M1, NA, NA, NA,
580 GPIO_PAD_CONF("SW82: MF_SMB_DATA", NATIVE, M1, NA, NA, NA,
585 GPIO_PAD_CONF("GPIO PAD TABLE END", NATIVE, M1, NA, NA, NA,