Lines Matching refs:spi_write
57 #define spi_write(val, addr) (*(volatile unsigned long *)(addr)) = val macro
69 spi_write(0x00, CR3); in spi_reset()
70 spi_write(0x02, CR1); in spi_reset()
75 spi_write(0x00, CR1); in spi_reset()
77 spi_write(spi_read(CR2) | SPI_RSTF, CR2); /* fifo reset */ in spi_reset()
78 spi_write(spi_read(CR2) & ~SPI_RSTF, CR2); in spi_reset()
80 spi_write(0, SPIDMCOR); in spi_reset()
86 spi_write(M25_READ, TBR); in spi_read_flash()
87 spi_write((addr >> 16) & 0xFF, TBR); in spi_read_flash()
88 spi_write((addr >> 8) & 0xFF, TBR); in spi_read_flash()
89 spi_write(addr & 0xFF, TBR); in spi_read_flash()
91 spi_write(SPIDMINTSR_DMEND, SPIDMINTSR); in spi_read_flash()
92 spi_write((unsigned long)buf, SPIWDMADR); in spi_read_flash()
93 spi_write(len & 0xFFFFFFE0, SPIWDMCNTR); in spi_read_flash()
94 spi_write(1, SPIDMCOR); in spi_read_flash()
96 spi_write(0xff, CR3); in spi_read_flash()
97 spi_write(spi_read(CR1) | SPI_SSDB, CR1); in spi_read_flash()
98 spi_write(spi_read(CR1) | SPI_SSA, CR1); in spi_read_flash()
104 spi_write(0, CR1); in spi_read_flash()