Lines Matching +full:cycle +full:- +full:frequency

1 // SPDX-License-Identifier: GPL-2.0
17 	 *	- number of chips on bus  in fsl_ddr_board_options()
18 	 *	- position of slot  in fsl_ddr_board_options()
19 	 *	- DDR1 vs. DDR2?  in fsl_ddr_board_options()
20 	 *	- ???  in fsl_ddr_board_options()
22 	 * This needs to be determined on a board-by-board basis.  in fsl_ddr_board_options()
23 	 *	0110	3/4 cycle late  in fsl_ddr_board_options()
24 	 *	0111	7/8 cycle late  in fsl_ddr_board_options()
26 	popts->clk_adjust = 7;  in fsl_ddr_board_options()
30 	 *	- frequency  in fsl_ddr_board_options()
31 	 *	- ddr1 vs. ddr2  in fsl_ddr_board_options()
33 	popts->cpo_override = 10;  in fsl_ddr_board_options()
37 	 *	- number of DIMMs  in fsl_ddr_board_options()
46 	popts->write_data_delay = 3;  in fsl_ddr_board_options()
49 	 * Factors to consider for half-strength driver enable:  in fsl_ddr_board_options()
50 	 *	- number of DIMMs installed  in fsl_ddr_board_options()
52 	popts->half_strength_driver_enable = 0;  in fsl_ddr_board_options()