39 static struct draco_baseboard_id __attribute__((section(".data"))) settings;  variable
74 	printf("Set default DDR3 settings\n");  in set_default_ddr3_timings()
75 	settings.ddr3 = ddr3_default;  in set_default_ddr3_timings()
82 	printf("device:\t\t%s\n", settings.ddr3.manu_name);  in print_ddr3_timings()
83 	printf("marking:\t%s\n", settings.ddr3.manu_marking);  in print_ddr3_timings()
112 	printf("device: \t'%s'\n", settings.chip.sdevname);  in print_chip_data()
113 	printf("hw version: \t'%s'\n", settings.chip.shwver);  in print_chip_data()
166 		     (uchar *)&settings.ddr3, sizeof(struct ddr3_data))) {  in read_eeprom()
172 		     (uchar *)&settings.chip, sizeof(settings.chip)))  in read_eeprom()
173 		printf("Could not read chip settings\n");  in read_eeprom()
175 	if (ddr3_default.magic == settings.ddr3.magic &&  in read_eeprom()
176 	    ddr3_default.version == settings.ddr3.version) {  in read_eeprom()
177 		printf("Using DDR3 settings from EEPROM\n");  in read_eeprom()
179 		if (ddr3_default.magic != settings.ddr3.magic)  in read_eeprom()
181 		if (ddr3_default.version != settings.ddr3.version)  in read_eeprom()
184 		printf("Using default settings\n");  in read_eeprom()
188 	if (MAGIC_CHIP == settings.chip.magic)  in read_eeprom()
217 	draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1;  in board_init_ddr()
218 	draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2;  in board_init_ddr()
219 	draco_ddr3_emif_reg_data.sdram_tim3 = settings.ddr3.sdram_tim3;  in board_init_ddr()
221 		settings.ddr3.emif_ddr_phy_ctlr_1;  in board_init_ddr()
222 	draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;  in board_init_ddr()
224 	draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;  in board_init_ddr()
226 	draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;  in board_init_ddr()
227 	draco_ddr3_data.datawdsratio0 = settings.ddr3.dt0wdsratio0;  in board_init_ddr()
228 	draco_ddr3_data.datafwsratio0 = settings.ddr3.dt0fwsratio0;  in board_init_ddr()
229 	draco_ddr3_data.datawrsratio0 = settings.ddr3.dt0wrsratio0;  in board_init_ddr()
231 	draco_ddr3_cmd_ctrl_data.cmd0csratio = settings.ddr3.ddr3_sratio;  in board_init_ddr()
232 	draco_ddr3_cmd_ctrl_data.cmd0iclkout = settings.ddr3.iclkout;  in board_init_ddr()
233 	draco_ddr3_cmd_ctrl_data.cmd1csratio = settings.ddr3.ddr3_sratio;  in board_init_ddr()
234 	draco_ddr3_cmd_ctrl_data.cmd1iclkout = settings.ddr3.iclkout;  in board_init_ddr()
235 	draco_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;  in board_init_ddr()
236 	draco_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;  in board_init_ddr()
238 	draco_ddr3_ioregs.cm0ioctl = settings.ddr3.ioctr_val,  in board_init_ddr()
239 	draco_ddr3_ioregs.cm1ioctl = settings.ddr3.ioctr_val,  in board_init_ddr()
240 	draco_ddr3_ioregs.cm2ioctl = settings.ddr3.ioctr_val,  in board_init_ddr()
241 	draco_ddr3_ioregs.dt0ioctl = settings.ddr3.ioctr_val,  in board_init_ddr()
242 	draco_ddr3_ioregs.dt1ioctl = settings.ddr3.ioctr_val,  in board_init_ddr()