270 	for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(19); pin++)  in nand_pinmux_setup()
274 	for (pin = SUNXI_GPC(20); pin <= SUNXI_GPC(22); pin++)  in nand_pinmux_setup()
280 	sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_NAND);  in nand_pinmux_setup()
381 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) {  in mmc_pinmux_setup()
396 			for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
412 			for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
418 			sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);  in mmc_pinmux_setup()
419 			sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);  in mmc_pinmux_setup()
420 			sunxi_gpio_set_drv(SUNXI_GPC(24), 2);  in mmc_pinmux_setup()
424 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
430 		sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2);  in mmc_pinmux_setup()
431 		sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);  in mmc_pinmux_setup()
432 		sunxi_gpio_set_drv(SUNXI_GPC(24), 2);  in mmc_pinmux_setup()
435 		for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) {  in mmc_pinmux_setup()
441 		for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) {  in mmc_pinmux_setup()
448 		for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) {  in mmc_pinmux_setup()
477 			for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) {  in mmc_pinmux_setup()
483 			sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3);  in mmc_pinmux_setup()
484 			sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP);  in mmc_pinmux_setup()
485 			sunxi_gpio_set_drv(SUNXI_GPC(24), 2);  in mmc_pinmux_setup()