Lines Matching refs:be
17 Also, standalone POST tests shall be supported.
28 2) The results of tests shall be saved so that it will be possible to
31 3) The following POST tests shall be developed for MPC823E-based
45 4) The LWMON board shall be used for reference.
50 The whole project can be divided into two independent tasks:
56 A new optional module will be added to U-Boot, which will run POST
61 The list of available POST tests will be configured at U-Boot build
63 tests. All POST tests will be divided into the following groups:
73 time and can be run on the regular basis (e.g. CPU test)
78 and cannot be run regularly (e.g. strong memory test, I2C test)
82 This group will contain those tests that can be run manually.
90 Also, all tests will be discriminated by the moment they run at.
91 Specifically, the following groups will be singled out:
115 The following flags will be defined:
123 #define POST_MANUAL 0x400 /* test can be executed manually */
133 argument is not NULL, the test with this name will be performed,
135 argument) will be executed. This routine will be called at least
143 This routine will be called from board_init_r() and will
148 This routine will print the list of all POST tests that can be
154 This routine will be called from POST tests to log their
157 will be identical to the printf() routine.
159 Also, the following board-specific routines will be called from the
166 power-on long-running tests shall be executed or not ("normal"
169 The list of available POST tests be kept in the post_tests array
171 be as follows:
183 This field will contain a short name of the test, which will be
195 which will be printed on user request. For more information, see
203 should be run at (before or after relocating to RAM), whether it
210 argument will be a pointer to the board info structure, while
211 the second will be a combination of bit flags specifying the
218 The lists of the POST tests that should be run at power-on/normal/
219 power-fail booting will be kept in the environment. Namely, the
220 following environment variables will be used: post_poweron,
225 The results of tests will be collected by the POST layer. The POST
236 Basically, the results of tests will be printed to stderr. This
237 feature may be enhanced in future to spool the log to a serial line,
243 All POST-related code will be #ifdef'ed with the CONFIG_POST macro.
244 This macro will be defined in the config_<board>.h file for those
258 A new file, post.h, will be created in the include/ directory. This
260 macros that will be reused for defining CONFIG_POST. As an example,
261 the following macro may be defined:
271 A new subdirectory will be created in the U-Boot root directory. It
273 tests. Each POST test in this directory will be placed into a
274 separate file (it will be needed for building standalone tests). Some
275 POST tests (mainly those for testing peripheral devices) will be
277 way will be used only if the test subtantially uses the driver.
282 user-space library will be developed to provide the POST interface
287 A new command, diag, will be added to U-Boot. This command will be
304 descriptions of the specified tests will be printed:
313 If the first argument to diag is 'run', the specified tests will be
314 executed. If no tests are specified, all available tests will be
317 It will be prohibited to execute tests running in ROM manually. The
322 The Linux kernel will be modified to detect power failures and
323 automatically reboot the system in such cases. It will be assumed
330 way. This feature will be configured in/out from the kernel
334 power-fail mode. If it does, the system will be powered off after
343 In order to support such tests, the following scheme will be
351 bit flag will be set in the flag argument to the test routine. This
389 systems. This section provides technical details of how it will be
394 The following generic POST tests will be developed:
411 amount of RAM will be checked. On power-fail booting a fool
412 memory check-up will be performed.
423 The mtcrf/mfcr instructions will be tested by loading different
426 the expected one. The mcrxr instruction will be tested by
430 register with the expected one. The rest of instructions will be
460 iteration r0/r1 will be used as operands and r2 for result. On
461 the second iteration, r1/r2 will be used as operands and r3 as
470 The test scheme will be identical to that from the previous
478 The test scheme will be identical to that from the previous
485 The first 2 instructions (b, bl) will be verified by jumping to
488 register will be checked as well (using mfspr). To verify the bc
490 and the condition register values will be checked. The list of
491 such combinations will be pre-built and linked in U-Boot at
499 All operations will be performed on a 16-byte array. The array
500 will be 4-byte aligned. The base register will point to offset
502 +7]. The test cases will be composed so that they will not cause
530 be used:
540 The negative pattern must be read at the last step
553 The negative pattern must be read at the last step
566 The negative pattern must be read at the last step
579 The negative pattern must be read at the last step
582 scenarios will be used:
612 to/from RAM. Specifically, there will be several test cases that will
615 compare its contents with the pattern. The following patterns will be
625 be used to detect adherent bits, i.e. bits whose state may randomly
626 change if adjacent bits are modified. The last pattern will be used
634 following areas will be verified: 0x00000000-0x00000800,
650 For verifying the I2C bus, a full I2C bus scanning will be performed
657 The CONFIG_SYS_POST_I2C_IGNORES define can be used to list I2C
658 devices which may or may not be present when using
662 daughtercard that may or may not be present) or not critical
668 section "Hazardous tests") will be used. Namely, this test will be
673 POST_REBOOT bit will be set in the flag argument to the test routine.
680 features will be verified:
684 This will be verified by reading RTC in polling within a short
689 This will be checked by setting RTC to a second before a month
691 will be performed for both leap- and nonleap-years.
697 MPC8xx communication processor module (CPM) will be tested:
705 The internal (local) loopback mode will be used to test SCC. To do
706 that the controllers will be configured accordingly and several
707 packets will be transmitted. These tests may be enhanced in future to
711 The test routines for the SCC ethernet tests will be located in
716 To perform these tests the internal (local) loopback mode will be
717 used. The SMC/SCC controllers will be configured to connect the
719 will be transmitted. These tests may be enhanced to make to perform
721 test will be executed manually.
723 The test routine for the SMC/SCC UART tests will be located in