Lines Matching refs:SPI

1 SPI (Serial Peripheral Interface) busses
3 SPI busses can be described with a node for the SPI master device
4 and a set of child nodes for each SPI slave on the bus.  For this
5 discussion, it is assumed that the system's SPI controller is in
6 SPI master mode.  This binding does not describe SPI controllers
9 The SPI master node requires the following properties:
11     		address on the SPI bus.
13 - compatible      - name of SPI bus controller following generic names
16 No other properties are required in the SPI bus node.  It is assumed
17 that a driver for an SPI bus device will understand that it is an SPI bus.
19 assigning chip select numbers.  Since SPI chip select configuration is
44 SPI slave nodes must be children of the SPI master node and can
47 - compatible      - (required) name of SPI device following generic names
49 - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
62 - spi-half-duplex  - (optional) Indicates that the SPI bus should wait for
65 Some SPI controllers and devices support Dual and Quad SPI transfer mode.
66 It allows data in SPI system transferred in 2 wires(DUAL) or 4 wires(QUAD).
71 If a gpio chipselect is used for the SPI slave the gpio number will be passed
74 SPI example for an MPC5200 SPI bus: