Lines Matching refs:div0
227 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
231 div0 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT; in zynq_clk_get_dci_rate()
235 zynq_clk_get_pll_rate(priv, ddrpll_clk), div0), div1); in zynq_clk_get_dci_rate()
243 u32 clk_ctrl, div0; in zynq_clk_get_peripheral_rate() local
248 div0 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT; in zynq_clk_get_peripheral_rate()
249 if (!div0) in zynq_clk_get_peripheral_rate()
250 div0 = 1; in zynq_clk_get_peripheral_rate()
265 zynq_clk_get_pll_rate(priv, pll), div0), in zynq_clk_get_peripheral_rate()
289 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs() argument
302 *div0 = d0; in zynq_clk_calc_peripheral_two_divs()
318 u32 clk_ctrl, div0 = 0, div1 = 0; in zynq_clk_set_peripheral_rate() local
331 &div0, &div1); in zynq_clk_set_peripheral_rate()
334 div0 = DIV_ROUND_CLOSEST(pll_rate, rate); in zynq_clk_set_peripheral_rate()
335 if (div0 > ZYNQ_CLK_MAXDIV) in zynq_clk_set_peripheral_rate()
336 div0 = ZYNQ_CLK_MAXDIV; in zynq_clk_set_peripheral_rate()
337 new_rate = DIV_ROUND_CLOSEST(rate, div0); in zynq_clk_set_peripheral_rate()
339 clk_ctrl |= div0 << CLK_CTRL_DIV0_SHIFT; in zynq_clk_set_peripheral_rate()