Lines Matching refs:popts
25 extern void fsl_ddr_board_options(memctl_options_t *popts,
740 memctl_options_t *popts, in populate_memctl_options() argument
833 popts->cs_local_opts[i].odt_rd_cfg = pdodt[i].odt_rd_cfg; in populate_memctl_options()
834 popts->cs_local_opts[i].odt_wr_cfg = pdodt[i].odt_wr_cfg; in populate_memctl_options()
835 popts->cs_local_opts[i].odt_rtt_norm = pdodt[i].odt_rtt_norm; in populate_memctl_options()
836 popts->cs_local_opts[i].odt_rtt_wr = pdodt[i].odt_rtt_wr; in populate_memctl_options()
838 popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; in populate_memctl_options()
839 popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; in populate_memctl_options()
841 popts->cs_local_opts[i].auto_precharge = 0; in populate_memctl_options()
850 popts->memctl_interleaving = 0; in populate_memctl_options()
858 popts->memctl_interleaving_mode = 0; in populate_memctl_options()
879 popts->ba_intlv_ctl = 0; in populate_memctl_options()
882 popts->registered_dimm_en = common_dimm->all_dimms_registered; in populate_memctl_options()
887 popts->ecc_mode = 0; /* 0 = disabled, 1 = enabled */ in populate_memctl_options()
891 popts->ecc_mode = 1; in populate_memctl_options()
893 popts->ecc_mode = 1; in populate_memctl_options()
896 popts->ecc_init_using_memctl = popts->ecc_mode ? 1 : 0; in populate_memctl_options()
904 popts->dqs_config = 0; in populate_memctl_options()
906 popts->dqs_config = 1; in populate_memctl_options()
910 popts->self_refresh_in_sleep = 1; in populate_memctl_options()
913 popts->dynamic_power = 0; in populate_memctl_options()
924 popts->data_bus_width = 0; in populate_memctl_options()
927 popts->data_bus_width = 1; in populate_memctl_options()
936 popts->data_bus_width = 0; in populate_memctl_options()
938 popts->data_bus_width = 1; in populate_memctl_options()
940 popts->data_bus_width = 2; in populate_memctl_options()
948 popts->x4_en = (pdimm[0].device_width == 4) ? 1 : 0; in populate_memctl_options()
953 popts->otf_burst_chop_en = 0; /* on-the-fly burst chop disable */ in populate_memctl_options()
954 popts->burst_length = DDR_BL8; /* Fixed 8-beat burst len */ in populate_memctl_options()
956 if ((popts->data_bus_width == 1) || (popts->data_bus_width == 2)) { in populate_memctl_options()
958 popts->otf_burst_chop_en = 0; in populate_memctl_options()
959 popts->burst_length = DDR_BL8; in populate_memctl_options()
961 popts->otf_burst_chop_en = 1; /* on-the-fly burst chop */ in populate_memctl_options()
962 popts->burst_length = DDR_OTF; /* on-the-fly BC4 and BL8 */ in populate_memctl_options()
966 popts->burst_length = DDR_BL4; /* has to be 4 for DDR2 */ in populate_memctl_options()
973 popts->mirrored_dimm = pdimm[i].mirrored_dimm; in populate_memctl_options()
983 popts->cas_latency_override = 0; in populate_memctl_options()
984 popts->cas_latency_override_value = 3; in populate_memctl_options()
985 if (popts->cas_latency_override) { in populate_memctl_options()
987 popts->cas_latency_override_value); in populate_memctl_options()
991 popts->use_derated_caslat = 0; in populate_memctl_options()
994 popts->additive_latency_override = 0; in populate_memctl_options()
995 popts->additive_latency_override_value = 3; in populate_memctl_options()
996 if (popts->additive_latency_override) { in populate_memctl_options()
998 popts->additive_latency_override_value); in populate_memctl_options()
1009 popts->twot_en = 0; in populate_memctl_options()
1010 popts->threet_en = 0; in populate_memctl_options()
1013 if (popts->registered_dimm_en) in populate_memctl_options()
1014 popts->ap_en = 1; /* 0 = disable, 1 = enable */ in populate_memctl_options()
1016 popts->ap_en = 0; /* disabled for DDR4 UDIMM/discrete default */ in populate_memctl_options()
1020 if (popts->registered_dimm_en || in populate_memctl_options()
1022 popts->ap_en = 1; in populate_memctl_options()
1035 popts->bstopre = picos_to_mclk(ctrl_num, common_dimm->refresh_rate_ps) in populate_memctl_options()
1046 popts->tfaw_window_four_activates_ps = mclk_to_picos(ctrl_num, 1); in populate_memctl_options()
1053 popts->tfaw_window_four_activates_ps = 37500; in populate_memctl_options()
1056 popts->tfaw_window_four_activates_ps = pdimm[0].tfaw_ps; in populate_memctl_options()
1058 popts->zq_en = 0; in populate_memctl_options()
1059 popts->wrlvl_en = 0; in populate_memctl_options()
1066 popts->wrlvl_en = 1; in populate_memctl_options()
1067 popts->zq_en = 1; in populate_memctl_options()
1068 popts->wrlvl_override = 0; in populate_memctl_options()
1095 popts->memctl_interleaving = 0; in populate_memctl_options()
1098 popts->memctl_interleaving = 1; in populate_memctl_options()
1100 popts->memctl_interleaving_mode = FSL_DDR_256B_INTERLEAVING; in populate_memctl_options()
1101 popts->memctl_interleaving = 1; in populate_memctl_options()
1110 popts->memctl_interleaving = 0; in populate_memctl_options()
1115 popts->memctl_interleaving_mode = in populate_memctl_options()
1118 popts->memctl_interleaving = in populate_memctl_options()
1124 popts->memctl_interleaving_mode = in populate_memctl_options()
1127 popts->memctl_interleaving = in populate_memctl_options()
1133 popts->memctl_interleaving_mode = in populate_memctl_options()
1136 popts->memctl_interleaving = in populate_memctl_options()
1142 popts->memctl_interleaving_mode = in populate_memctl_options()
1145 popts->memctl_interleaving = in populate_memctl_options()
1152 popts->memctl_interleaving_mode = in populate_memctl_options()
1157 popts->memctl_interleaving_mode = in populate_memctl_options()
1162 popts->memctl_interleaving_mode = in populate_memctl_options()
1168 popts->memctl_interleaving_mode = in populate_memctl_options()
1173 popts->memctl_interleaving_mode = in populate_memctl_options()
1178 popts->memctl_interleaving_mode = in populate_memctl_options()
1182 popts->memctl_interleaving = 0; in populate_memctl_options()
1197 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; in populate_memctl_options()
1200 popts->ba_intlv_ctl = FSL_DDR_CS2_CS3; in populate_memctl_options()
1203 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_AND_CS2_CS3; in populate_memctl_options()
1206 popts->ba_intlv_ctl = FSL_DDR_CS0_CS1_CS2_CS3; in populate_memctl_options()
1209 popts->ba_intlv_ctl = auto_bank_intlv(pdimm); in populate_memctl_options()
1212 switch (popts->ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { in populate_memctl_options()
1216 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1227 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1233 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1242 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1251 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1257 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1266 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1273 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1281 popts->ba_intlv_ctl = 0; in populate_memctl_options()
1288 popts->addr_hash = 0; in populate_memctl_options()
1291 popts->addr_hash = 1; in populate_memctl_options()
1295 popts->quad_rank_present = 1; in populate_memctl_options()
1297 popts->package_3ds = pdimm->package_3ds; in populate_memctl_options()
1301 if (popts->registered_dimm_en) { in populate_memctl_options()
1302 popts->rcw_override = 1; in populate_memctl_options()
1303 popts->rcw_1 = 0x000a5a00; in populate_memctl_options()
1305 popts->rcw_2 = 0x00000000; in populate_memctl_options()
1307 popts->rcw_2 = 0x00100000; in populate_memctl_options()
1309 popts->rcw_2 = 0x00200000; in populate_memctl_options()
1311 popts->rcw_2 = 0x00300000; in populate_memctl_options()
1315 fsl_ddr_board_options(popts, pdimm, ctrl_num); in populate_memctl_options()