29 	struct ccsr_ddr __iomem *ddr;  in fsl_ddr_get_version()  local
34 		ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;  in fsl_ddr_get_version()
38 		ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR;  in fsl_ddr_get_version()
43 		ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR;  in fsl_ddr_get_version()
48 		ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR;  in fsl_ddr_get_version()
55 	ver_major_minor_errata = (ddr_in32(&ddr->ip_rev1) & 0xFFFF) << 8;  in fsl_ddr_get_version()
56 	ver_major_minor_errata |= (ddr_in32(&ddr->ip_rev2) & 0xFF00) >> 8;  in fsl_ddr_get_version()
177 	struct ccsr_ddr __iomem *ddr =  in print_ddr_info()  local
184 	uint32_t cs0_config = ddr_in32(&ddr->cs0_config);  in print_ddr_info()
186 	uint32_t sdram_cfg = ddr_in32(&ddr->sdram_cfg);  in print_ddr_info()
192 		ddr = (void __iomem *)CONFIG_SYS_FSL_DDR2_ADDR;  in print_ddr_info()
193 		sdram_cfg = ddr_in32(&ddr->sdram_cfg);  in print_ddr_info()
199 		ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR;  in print_ddr_info()
200 		sdram_cfg = ddr_in32(&ddr->sdram_cfg);  in print_ddr_info()
237 	cas_lat = ((ddr_in32(&ddr->timing_cfg_1) >> 16) & 0xf);  in print_ddr_info()
242 	cas_lat += ((ddr_in32(&ddr->timing_cfg_3) >> 12) & 3) << 4;  in print_ddr_info()
345 	struct ccsr_ddr __iomem *ddr;  in fsl_ddr_sync_memctl_refresh()  local
350 			ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;  in fsl_ddr_sync_memctl_refresh()
354 			ddr = (void *)CONFIG_SYS_FSL_DDR2_ADDR;  in fsl_ddr_sync_memctl_refresh()
359 			ddr = (void *)CONFIG_SYS_FSL_DDR3_ADDR;  in fsl_ddr_sync_memctl_refresh()
364 			ddr = (void *)CONFIG_SYS_FSL_DDR4_ADDR;  in fsl_ddr_sync_memctl_refresh()
371 		ddrc_debug20 = ddr_in32(&ddr->debug[19]);  in fsl_ddr_sync_memctl_refresh()
372 		ddrc_debug2_p[i] = &ddr->debug[1];  in fsl_ddr_sync_memctl_refresh()
376 			ddrc_debug20 = ddr_in32(&ddr->debug[19]);  in fsl_ddr_sync_memctl_refresh()
378 		ddrc_debug2[i] = ddr_in32(&ddr->debug[1]) | DDRC_DEBUG2_RF;  in fsl_ddr_sync_memctl_refresh()