19 	struct ddr2_phy_regs *ddr2_phy;  in ddr2_phy_init()  local
22 	ddr2_phy = ioremap(PIC32_DDR2P_BASE, sizeof(*ddr2_phy));  in ddr2_phy_init()
26 	       RECALIB_CNT(0x10), &ddr2_phy->dll_recalib);  in ddr2_phy_init()
35 	writel(pad_ctl, &ddr2_phy->pad_ctrl);  in ddr2_phy_init()
39 	       SCL_ODTCSWW, &ddr2_phy->scl_config_1);  in ddr2_phy_init()
42 	writel(SCL_CSEN | SCL_WCAS_LAT(WL), &ddr2_phy->scl_config_2);  in ddr2_phy_init()
45 	writel(SCL_CAPCLKDLY(3) | SCL_DDRCLKDLY(4), &ddr2_phy->scl_latency);  in ddr2_phy_init()
51 	struct ddr2_phy_regs *ddr2_phy;  in ddr2_phy_calib_start()  local
53 	ddr2_phy = ioremap(PIC32_DDR2P_BASE, sizeof(*ddr2_phy));  in ddr2_phy_calib_start()
56 	writel(SCL_START | SCL_EN, &ddr2_phy->scl_start);  in ddr2_phy_calib_start()
59 	return wait_for_bit_le32(&ddr2_phy->scl_start, SCL_LUBPASS,  in ddr2_phy_calib_start()