29 	struct eth_mac_regs *mac_p = priv->mac_regs_p;  in dw_mdio_read()  local
31 	struct eth_mac_regs *mac_p = bus->priv;  in dw_mdio_read()
40 	writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, &mac_p->miiaddr);  in dw_mdio_read()
44 		if (!(readl(&mac_p->miiaddr) & MII_BUSY))  in dw_mdio_read()
45 			return readl(&mac_p->miidata);  in dw_mdio_read()
57 	struct eth_mac_regs *mac_p = priv->mac_regs_p;  in dw_mdio_write()  local
59 	struct eth_mac_regs *mac_p = bus->priv;  in dw_mdio_write()
65 	writel(val, &mac_p->miidata);  in dw_mdio_write()
69 	writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, &mac_p->miiaddr);  in dw_mdio_write()
73 		if (!(readl(&mac_p->miiaddr) & MII_BUSY)) {  in dw_mdio_write()
220 	struct eth_mac_regs *mac_p = priv->mac_regs_p;  in _dw_write_hwaddr()  local
227 	writel(macid_hi, &mac_p->macaddr0hi);  in _dw_write_hwaddr()
228 	writel(macid_lo, &mac_p->macaddr0lo);  in _dw_write_hwaddr()
233 static int dw_adjust_link(struct dw_eth_dev *priv, struct eth_mac_regs *mac_p,  in dw_adjust_link()  argument
236 	u32 conf = readl(&mac_p->conf) | FRAMEBURSTENABLE | DISABLERXOWN;  in dw_adjust_link()
254 	writel(conf, &mac_p->conf);  in dw_adjust_link()
265 	struct eth_mac_regs *mac_p = priv->mac_regs_p;  in _dw_eth_halt()  local
268 	writel(readl(&mac_p->conf) & ~(RXENABLE | TXENABLE), &mac_p->conf);  in _dw_eth_halt()
276 	struct eth_mac_regs *mac_p = priv->mac_regs_p;  in designware_eth_init()  local
288 		writel(readl(&mac_p->conf) | MII_PORTSELECT, &mac_p->conf);  in designware_eth_init()
290 		writel(readl(&mac_p->conf) & ~MII_PORTSELECT, &mac_p->conf);  in designware_eth_init()
335 	ret = dw_adjust_link(priv, mac_p, priv->phydev);  in designware_eth_init()
344 	struct eth_mac_regs *mac_p = priv->mac_regs_p;  in designware_eth_enable()  local
349 	writel(readl(&mac_p->conf) | RXENABLE | TXENABLE, &mac_p->conf);  in designware_eth_enable()