271 OUTL(struct eth_device *dev, int command, u_long addr)  in OUTL()  function
376 		OUTL(dev, ChipReset, ChipCmd);  in natsemi_initialize()
396 		OUTL(dev, (chip_config | PhyRst), ChipConfig);  in natsemi_initialize()
398 		OUTL(dev, chip_config, ChipConfig);  in natsemi_initialize()
407 		OUTL(dev, SavedClkRun & ~0x100, ClkRun);  in natsemi_initialize()
451 		OUTL(dev, cmdval, ee_addr);
453 		OUTL(dev, cmdval | EE_ShiftClk, ee_addr);
457 	OUTL(dev, 0, ee_addr); /*bring chip select low*/
458 	OUTL(dev, EE_ShiftClk, ee_addr);
464 		OUTL(dev, cmdval, ee_addr);
466 		OUTL(dev, cmdval | EE_ShiftClk, ee_addr);
472 		OUTL(dev, cmdval, ee_addr);
474 		OUTL(dev, cmdval | EE_ShiftClk, ee_addr);
478 	OUTL(dev, 0, ee_addr); /*bring chip select low*/
479 	OUTL(dev, EE_ShiftClk, ee_addr);
481 		OUTL(dev, EE_Write0, ee_addr); /*poll for done*/
489 	OUTL(dev, EE_Write0, ee_addr);
490 	OUTL(dev, 0, ee_addr);
503 	OUTL(dev, EE_Write0, ee_addr);  in read_eeprom()
508 		OUTL(dev, dataval, ee_addr);  in read_eeprom()
510 		OUTL(dev, dataval | EE_ShiftClk, ee_addr);  in read_eeprom()
513 	OUTL(dev, EE_ChipSelect, ee_addr);  in read_eeprom()
517 		OUTL(dev, EE_ChipSelect | EE_ShiftClk, ee_addr);  in read_eeprom()
520 		OUTL(dev, EE_ChipSelect, ee_addr);  in read_eeprom()
525 	OUTL(dev, EE_Write0, ee_addr);  in read_eeprom()
526 	OUTL(dev, 0, ee_addr);  in read_eeprom()
570 	OUTL(dev, SavedClkRun & ~0x100, ClkRun);  in natsemi_init()
584 	OUTL(dev, tx_config, TxConfig);  in natsemi_init()
585 	OUTL(dev, rx_config, RxConfig);  in natsemi_init()
590 	OUTL(dev, (RxOn | TxOn), ChipCmd);  in natsemi_init()
606 	OUTL(dev, ChipReset, ChipCmd);  in natsemi_reset()
620 	OUTL(dev, 0, IntrMask);  in natsemi_reset()
621 	OUTL(dev, 0, IntrEnable);  in natsemi_reset()
639 		OUTL(dev, i, RxFilterAddr);  in natsemi_init_rxfilter()
663 	OUTL(dev, (u32) & txd, TxRingPtr);  in natsemi_init_txd()
704 	OUTL(dev, (u32) & rxd[0], RxRingPtr);  in natsemi_init_rxd()
728 	OUTL(dev, rx_mode, RxFilterAddr);  in natsemi_set_rx_mode()
747 	OUTL(dev, tx_config, TxConfig);  in natsemi_check_duplex()
748 	OUTL(dev, rx_config, RxConfig);  in natsemi_check_duplex()
764 	OUTL(dev, TxOff, ChipCmd);  in natsemi_send()
777 	OUTL(dev, phys_to_bus((u32) & txd), TxRingPtr);  in natsemi_send()
784 	OUTL(dev, TxOn, ChipCmd);  in natsemi_send()
857 	OUTL(dev, RxOn, ChipCmd);  in natsemi_poll()
875 	OUTL(dev, 0, IntrMask);  in natsemi_disable()
876 	OUTL(dev, 0, IntrEnable);  in natsemi_disable()
879 	OUTL(dev, RxOff | TxOff, ChipCmd);  in natsemi_disable()
882 	OUTL(dev, SavedClkRun, ClkRun);  in natsemi_disable()